From: BALATON Zoltan Date: Sun, 11 Aug 2019 21:14:53 +0000 (+0200) Subject: ati-vga: Fix GPIO_MONID register write X-Git-Tag: v4.2.0-rc0~216^2~5 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=006388a8c78124eb193027366894fe4568065447;p=thirdparty%2Fqemu.git ati-vga: Fix GPIO_MONID register write Also update bitbang_i2c state when output bits are changed while enable bits are set. This fixes EDID access by the ATI FCode ROM. Signed-off-by: BALATON Zoltan Message-id: 292e70a92b7fbfd9a4120d433dbdcfda4e5f6c3c.1565558093.git.balaton@eik.bme.hu Signed-off-by: Gerd Hoffmann --- diff --git a/hw/display/ati.c b/hw/display/ati.c index 6cdcbef238f..eb54f6842fe 100644 --- a/hw/display/ati.c +++ b/hw/display/ati.c @@ -564,12 +564,15 @@ static void ati_mm_write(void *opaque, hwaddr addr, addr - GPIO_MONID, data, size); /* * Rage128p accesses DDC used to get EDID via these bits. - * Only touch i2c when write overlaps 3rd byte because some - * drivers access this reg via multiple partial writes and - * without this spurious bits would be sent. + * Because some drivers access this via multiple byte writes + * we have to be careful when we send bits to avoid spurious + * changes in bitbang_i2c state. So only do it when mask is set + * and either the enable bits are changed or output bits changed + * while enabled. */ if ((s->regs.gpio_monid & BIT(25)) && - addr <= GPIO_MONID + 2 && addr + size > GPIO_MONID + 2) { + ((addr <= GPIO_MONID + 2 && addr + size > GPIO_MONID + 2) || + (addr == GPIO_MONID && (s->regs.gpio_monid & 0x60000)))) { s->regs.gpio_monid = ati_i2c(&s->bbi2c, s->regs.gpio_monid, 1); } }