From: Zichen Xie Date: Wed, 23 Oct 2024 14:51:47 +0000 (-0500) Subject: clk: sophgo: avoid integer overflow in sg2042_pll_recalc_rate() X-Git-Tag: v6.13-rc1~110^2~10 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=00f8f70a0e8c6601861628be26270a0b6f4bbb34;p=thirdparty%2Flinux.git clk: sophgo: avoid integer overflow in sg2042_pll_recalc_rate() This was found by a static analyzer. There may be a potential integer overflow issue in sg2042_pll_recalc_rate(). numerator is defined as u64 while parent_rate is defined as unsigned long and ctrl_table.fbdiv is defined as unsigned int. On 32-bit machine, the result of the calculation will be limited to "u32" without correct casting. Integer overflow may occur on high-performance systems. Fixes: 48cf7e01386e ("clk: sophgo: Add SG2042 clock driver") Signed-off-by: Zichen Xie Reviewed-by: Chen Wang Link: https://lore.kernel.org/r/20241023145146.13130-1-zichenxie0106@gmail.com Reviewed-by: Dan Carpenter Signed-off-by: Stephen Boyd --- diff --git a/drivers/clk/sophgo/clk-sg2042-pll.c b/drivers/clk/sophgo/clk-sg2042-pll.c index ff9deeef509b8..1537f4f05860e 100644 --- a/drivers/clk/sophgo/clk-sg2042-pll.c +++ b/drivers/clk/sophgo/clk-sg2042-pll.c @@ -153,7 +153,7 @@ static unsigned long sg2042_pll_recalc_rate(unsigned int reg_value, sg2042_pll_ctrl_decode(reg_value, &ctrl_table); - numerator = parent_rate * ctrl_table.fbdiv; + numerator = (u64)parent_rate * ctrl_table.fbdiv; denominator = ctrl_table.refdiv * ctrl_table.postdiv1 * ctrl_table.postdiv2; do_div(numerator, denominator); return numerator;