From: AngeloGioacchino Del Regno Date: Thu, 3 Jul 2025 12:08:46 +0000 (+0200) Subject: dt-bindings: PCI: mediatek-gen3: Add support for MT6991/MT8196 X-Git-Tag: v6.18-rc1~60^2~10^2~1 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=0106b6c114cf8b77d801d9e280b221f8b4d5595b;p=thirdparty%2Fkernel%2Fstable.git dt-bindings: PCI: mediatek-gen3: Add support for MT6991/MT8196 Add compatible strings for MT8196 and MT6991 (which are fully compatible between each other) and clock definitions. These new SoCs don't have tl_96m and tl_32k clocks, but need an AHB to APB bus clock and a low power clock. Signed-off-by: AngeloGioacchino Del Regno [mani: changed 'maxItems' to 'minItems' for reset] Signed-off-by: Manivannan Sadhasivam Reviewed-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20250703120847.121826-3-angelogioacchino.delregno@collabora.com --- diff --git a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml index 162406e0691a8..0278845701ce8 100644 --- a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml +++ b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml @@ -52,7 +52,12 @@ properties: - mediatek,mt8188-pcie - mediatek,mt8195-pcie - const: mediatek,mt8192-pcie + - items: + - enum: + - mediatek,mt6991-pcie + - const: mediatek,mt8196-pcie - const: mediatek,mt8192-pcie + - const: mediatek,mt8196-pcie - const: airoha,en7581-pcie reg: @@ -212,6 +217,36 @@ allOf: mediatek,pbus-csr: false + - if: + properties: + compatible: + contains: + enum: + - mediatek,mt8196-pcie + then: + properties: + clocks: + minItems: 6 + + clock-names: + items: + - const: pl_250m + - const: tl_26m + - const: bus + - const: low_power + - const: peri_26m + - const: peri_mem + + resets: + minItems: 2 + + reset-names: + items: + - const: phy + - const: mac + + mediatek,pbus-csr: false + - if: properties: compatible: