From: Edgar E. Iglesias Date: Fri, 4 Sep 2009 08:38:59 +0000 (+0200) Subject: microblaze: Trap on illegal load/store sizes. X-Git-Tag: v0.12.0-rc0~1352 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=0187688f3270433269fc7d4909ad36dc5c5db7aa;p=thirdparty%2Fqemu.git microblaze: Trap on illegal load/store sizes. Signed-off-by: Edgar E. Iglesias --- diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c index b180d24b0e1..bb37f04edb0 100644 --- a/target-microblaze/translate.c +++ b/target-microblaze/translate.c @@ -803,6 +803,12 @@ static void dec_load(DisasContext *dc) unsigned int size; size = 1 << (dc->opcode & 3); + if (size > 4 && (dc->tb_flags & MSR_EE_FLAG) + && !(dc->env->pvr.regs[2] & PVR2_ILL_OPCODE_EXC_MASK)) { + tcg_gen_movi_tl(cpu_SR[SR_ESR], ESR_EC_ILLEGAL_OP); + t_gen_raise_exception(dc, EXCP_HW_EXCP); + return; + } LOG_DIS("l %x %d\n", dc->opcode, size); t_sync_flags(dc); @@ -849,6 +855,13 @@ static void dec_store(DisasContext *dc) size = 1 << (dc->opcode & 3); + if (size > 4 && (dc->tb_flags & MSR_EE_FLAG) + && !(dc->env->pvr.regs[2] & PVR2_ILL_OPCODE_EXC_MASK)) { + tcg_gen_movi_tl(cpu_SR[SR_ESR], ESR_EC_ILLEGAL_OP); + t_gen_raise_exception(dc, EXCP_HW_EXCP); + return; + } + LOG_DIS("s%d%s\n", size, dc->type_b ? "i" : ""); t_sync_flags(dc); /* If we get a fault on a dslot, the jmpstate better be in sync. */