From: Paul Kocialkowski Date: Tue, 1 Jul 2025 20:11:23 +0000 (+0200) Subject: clk: sunxi-ng: v3s: Fix TCON clock parents X-Git-Tag: v6.16~4^2^2 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=01fdcbc7e5a56c9cba521e0f237cb5c3fd162432;p=thirdparty%2Fkernel%2Flinux.git clk: sunxi-ng: v3s: Fix TCON clock parents The TCON clock can be parented to both the video PLL and the periph0 PLL. Add the latter, which was missing from the list. Fixes: d0f11d14b0bc ("clk: sunxi-ng: add support for V3s CCU") Signed-off-by: Paul Kocialkowski Link: https://patch.msgid.link/20250701201124.812882-5-paulk@sys-base.io Signed-off-by: Chen-Yu Tsai --- diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-v3s.c b/drivers/clk/sunxi-ng/ccu-sun8i-v3s.c index 86d933d1ac722..52e4369664c58 100644 --- a/drivers/clk/sunxi-ng/ccu-sun8i-v3s.c +++ b/drivers/clk/sunxi-ng/ccu-sun8i-v3s.c @@ -350,7 +350,7 @@ static SUNXI_CCU_M_WITH_MUX_GATE(de_clk, "de", de_parents, 0x104, 0, 4, 24, 2, BIT(31), CLK_SET_RATE_PARENT); -static const char * const tcon_parents[] = { "pll-video" }; +static const char * const tcon_parents[] = { "pll-video", "pll-periph0" }; static SUNXI_CCU_M_WITH_MUX_GATE(tcon_clk, "tcon", tcon_parents, 0x118, 0, 4, 24, 3, BIT(31), 0);