From: Gil Fine <gil.fine@linux.intel.com>
Date: Wed, 25 Jan 2023 09:48:14 +0000 (+0200)
Subject: thunderbolt: Fix PCIe adapter capability length for USB4 v2 routers
X-Git-Tag: v6.5-rc1~73^2~11^2~9
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=0209c808a56e6469f0ed50dd2e70c3aec074bf90;p=thirdparty%2Flinux.git

thunderbolt: Fix PCIe adapter capability length for USB4 v2 routers

For USB4 v2 routers, the PCIe adapter capability length is longer.
Display the correct capability length in the debugfs register dump.

Signed-off-by: Gil Fine <gil.fine@linux.intel.com>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
---

diff --git a/drivers/thunderbolt/debugfs.c b/drivers/thunderbolt/debugfs.c
index 78bcf77831fe2..c9ddd49138d82 100644
--- a/drivers/thunderbolt/debugfs.c
+++ b/drivers/thunderbolt/debugfs.c
@@ -14,7 +14,8 @@
 #include "tb.h"
 #include "sb_regs.h"
 
-#define PORT_CAP_PCIE_LEN	1
+#define PORT_CAP_V1_PCIE_LEN	1
+#define PORT_CAP_V2_PCIE_LEN	2
 #define PORT_CAP_POWER_LEN	2
 #define PORT_CAP_LANE_LEN	3
 #define PORT_CAP_USB3_LEN	5
@@ -1175,7 +1176,10 @@ static void port_cap_show(struct tb_port *port, struct seq_file *s,
 
 	case TB_PORT_CAP_ADAP:
 		if (tb_port_is_pcie_down(port) || tb_port_is_pcie_up(port)) {
-			length = PORT_CAP_PCIE_LEN;
+			if (usb4_switch_version(port->sw) < 2)
+				length = PORT_CAP_V1_PCIE_LEN;
+			else
+				length = PORT_CAP_V2_PCIE_LEN;
 		} else if (tb_port_is_dpin(port)) {
 			if (usb4_switch_version(port->sw) < 2)
 				length = PORT_CAP_DP_V1_LEN;