From: Thorsten Blum Date: Wed, 19 Feb 2025 10:44:35 +0000 (+0100) Subject: clk: socfpga: stratix10: Optimize local variables X-Git-Tag: v6.16-rc1~114^2~1^2^2 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=0248bfb2557932b27d3e1375a3dc6902127b42bc;p=thirdparty%2Fkernel%2Flinux.git clk: socfpga: stratix10: Optimize local variables Since readl() returns a u32, the local variable reg can also have the data type u32. Furthermore, mdiv and refdiv are derived from reg and can also be a u32. Since do_div() casts the divisor to u32 anyway, changing the data type of refdiv to u32 removes the following Coccinelle/coccicheck warning reported by do_div.cocci: WARNING: do_div() does a 64-by-32 division, please consider using div64_ul instead Compile-tested only. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Thorsten Blum Signed-off-by: Dinh Nguyen --- diff --git a/drivers/clk/socfpga/clk-pll-s10.c b/drivers/clk/socfpga/clk-pll-s10.c index 1d82737befd33..a88c212bda129 100644 --- a/drivers/clk/socfpga/clk-pll-s10.c +++ b/drivers/clk/socfpga/clk-pll-s10.c @@ -83,9 +83,9 @@ static unsigned long clk_pll_recalc_rate(struct clk_hw *hwclk, unsigned long parent_rate) { struct socfpga_pll *socfpgaclk = to_socfpga_clk(hwclk); - unsigned long mdiv; - unsigned long refdiv; - unsigned long reg; + u32 mdiv; + u32 refdiv; + u32 reg; unsigned long long vco_freq; /* read VCO1 reg for numerator and denominator */