From: Melissa Wen Date: Fri, 25 Apr 2025 20:52:30 +0000 (-0300) Subject: drm/amd/display: no 3D and blnd LUT as DPP color caps for DCN401 X-Git-Tag: v6.16-rc1~33^2~6^2~38 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=02fd27e6cf853e55cebcefb4aa7a9828a6848510;p=thirdparty%2Flinux.git drm/amd/display: no 3D and blnd LUT as DPP color caps for DCN401 Match what is declared as DPP color caps with hw caps. DCN401 has MPC shaper + 3D LUTs that are movable before and after blending (get from plane or stream), but no DPP blend LUTs. Signed-off-by: Melissa Wen Reviewed-by: Alex Hung Signed-off-by: Alex Deucher --- diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c index e0e32975ca34c..f420c4dafa03c 100644 --- a/drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c +++ b/drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c @@ -1938,8 +1938,8 @@ static bool dcn401_resource_construct( dc->caps.color.dpp.gamma_corr = 1; dc->caps.color.dpp.dgam_rom_for_yuv = 0; - dc->caps.color.dpp.hw_3d_lut = 1; - dc->caps.color.dpp.ogam_ram = 1; + dc->caps.color.dpp.hw_3d_lut = 0; + dc->caps.color.dpp.ogam_ram = 0; // no OGAM ROM on DCN2 and later ASICs dc->caps.color.dpp.ogam_rom_caps.srgb = 0; dc->caps.color.dpp.ogam_rom_caps.bt2020 = 0;