From: Andreas Krebbel <krebbel@linux.ibm.com>
Date: Tue, 10 Jan 2023 08:59:02 +0000 (+0100)
Subject: IBM zSystems: Make -fcall-saved-... work.
X-Git-Tag: basepoints/gcc-14~2129
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=0333892db367b2b97b1ab9d3702b16f3f9e92ec3;p=thirdparty%2Fgcc.git

IBM zSystems: Make -fcall-saved-... work.

gcc/ChangeLog:

	* config/s390/s390.cc (s390_register_info): Check call_used_regs
	instead of hard-coding the register numbers for call saved
	registers.
	(s390_optimize_register_info): Likewise.

gcc/testsuite/ChangeLog:

	* gcc.target/s390/fcall-saved.c: New test.
---

diff --git a/gcc/config/s390/s390.cc b/gcc/config/s390/s390.cc
index 42177c204f63..a9bb610385b8 100644
--- a/gcc/config/s390/s390.cc
+++ b/gcc/config/s390/s390.cc
@@ -10075,8 +10075,8 @@ s390_register_info ()
 
   memset (cfun_frame_layout.gpr_save_slots, SAVE_SLOT_NONE, 16);
 
-  for (i = 6; i < 16; i++)
-    if (clobbered_regs[i])
+  for (i = 0; i < 16; i++)
+    if (clobbered_regs[i] && !call_used_regs[i])
       cfun_gpr_save_slot (i) = SAVE_SLOT_STACK;
 
   s390_register_info_stdarg_fpr ();
@@ -10136,10 +10136,8 @@ s390_optimize_register_info ()
 	|| cfun_frame_layout.save_return_addr_p
 	|| crtl->calls_eh_return);
 
-  memset (cfun_frame_layout.gpr_save_slots, SAVE_SLOT_NONE, 6);
-
-  for (i = 6; i < 16; i++)
-    if (!clobbered_regs[i])
+  for (i = 0; i < 16; i++)
+    if (!clobbered_regs[i] || call_used_regs[i])
       cfun_gpr_save_slot (i) = SAVE_SLOT_NONE;
 
   s390_register_info_set_ranges ();
diff --git a/gcc/testsuite/gcc.target/s390/fcall-saved.c b/gcc/testsuite/gcc.target/s390/fcall-saved.c
new file mode 100644
index 000000000000..a08155372f90
--- /dev/null
+++ b/gcc/testsuite/gcc.target/s390/fcall-saved.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-O3 -mzarch -fcall-saved-r4" } */
+
+void test(void) {
+    asm volatile("nop" ::: "r4");
+}
+
+/* { dg-final { scan-assembler-times "\tstg\t" 1 { target { lp64 } } } } */
+/* { dg-final { scan-assembler-times "\tlg\t" 1 { target { lp64 } } } } */
+/* { dg-final { scan-assembler-times "\tst\t" 1 { target { ! lp64 } } } } */
+/* { dg-final { scan-assembler-times "\tl\t" 1 { target { ! lp64 } } } } */