From: Alex Deucher Date: Fri, 30 Apr 2021 16:21:46 +0000 (-0400) Subject: drm/amdgpu/pm: add documentation for pp_od_clock_voltage for APUs X-Git-Tag: v5.14-rc1~114^2~21^2~49 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=0487bbb44464288194debc1a91e785777f8d1586;p=thirdparty%2Flinux.git drm/amdgpu/pm: add documentation for pp_od_clock_voltage for APUs APUs only support adjusting the SCLK domain. Reviewed-by: Evan Quan Signed-off-by: Alex Deucher --- diff --git a/drivers/gpu/drm/amd/pm/amdgpu_pm.c b/drivers/gpu/drm/amd/pm/amdgpu_pm.c index f11cecdd70f60..8c2209bcb01f9 100644 --- a/drivers/gpu/drm/amd/pm/amdgpu_pm.c +++ b/drivers/gpu/drm/amd/pm/amdgpu_pm.c @@ -735,6 +735,14 @@ static ssize_t amdgpu_set_pp_table(struct device *dev, * - a list of valid ranges for sclk, mclk, and voltage curve points * labeled OD_RANGE * + * < For APUs > + * + * Reading the file will display: + * + * - minimum and maximum engine clock labeled OD_SCLK + * + * - a list of valid ranges for sclk labeled OD_RANGE + * * To manually adjust these settings: * * - First select manual using power_dpm_force_performance_level