From: Greg Kroah-Hartman Date: Thu, 29 Aug 2013 20:15:11 +0000 (-0700) Subject: 3.10-stable patches X-Git-Tag: v3.0.95~26 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=089cab8ea9b14530fad814c3a8ac114ad18c9848;p=thirdparty%2Fkernel%2Fstable-queue.git 3.10-stable patches added patches: drm-nouveau-mc-fix-race-condition-between-constructor-and-request_irq.patch --- diff --git a/queue-3.10/drm-nouveau-mc-fix-race-condition-between-constructor-and-request_irq.patch b/queue-3.10/drm-nouveau-mc-fix-race-condition-between-constructor-and-request_irq.patch new file mode 100644 index 00000000000..f74347b654b --- /dev/null +++ b/queue-3.10/drm-nouveau-mc-fix-race-condition-between-constructor-and-request_irq.patch @@ -0,0 +1,147 @@ +From 6ff8c76a566f823d796359a6c1d76b7668f1e34d Mon Sep 17 00:00:00 2001 +From: Ben Skeggs +Date: Wed, 21 Aug 2013 10:13:30 +1000 +Subject: drm/nouveau/mc: fix race condition between constructor and request_irq() + +From: Ben Skeggs + +commit 6ff8c76a566f823d796359a6c1d76b7668f1e34d upstream. + +Signed-off-by: Ben Skeggs +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/nouveau/core/include/subdev/mc.h | 7 ++++--- + drivers/gpu/drm/nouveau/core/subdev/mc/base.c | 6 +++++- + drivers/gpu/drm/nouveau/core/subdev/mc/nv04.c | 3 +-- + drivers/gpu/drm/nouveau/core/subdev/mc/nv44.c | 3 +-- + drivers/gpu/drm/nouveau/core/subdev/mc/nv50.c | 3 +-- + drivers/gpu/drm/nouveau/core/subdev/mc/nv98.c | 3 +-- + drivers/gpu/drm/nouveau/core/subdev/mc/nvc0.c | 3 +-- + 7 files changed, 14 insertions(+), 14 deletions(-) + +--- a/drivers/gpu/drm/nouveau/core/include/subdev/mc.h ++++ b/drivers/gpu/drm/nouveau/core/include/subdev/mc.h +@@ -20,8 +20,8 @@ nouveau_mc(void *obj) + return (void *)nv_device(obj)->subdev[NVDEV_SUBDEV_MC]; + } + +-#define nouveau_mc_create(p,e,o,d) \ +- nouveau_mc_create_((p), (e), (o), sizeof(**d), (void **)d) ++#define nouveau_mc_create(p,e,o,m,d) \ ++ nouveau_mc_create_((p), (e), (o), (m), sizeof(**d), (void **)d) + #define nouveau_mc_destroy(p) ({ \ + struct nouveau_mc *pmc = (p); _nouveau_mc_dtor(nv_object(pmc)); \ + }) +@@ -33,7 +33,8 @@ nouveau_mc(void *obj) + }) + + int nouveau_mc_create_(struct nouveau_object *, struct nouveau_object *, +- struct nouveau_oclass *, int, void **); ++ struct nouveau_oclass *, const struct nouveau_mc_intr *, ++ int, void **); + void _nouveau_mc_dtor(struct nouveau_object *); + int _nouveau_mc_init(struct nouveau_object *); + int _nouveau_mc_fini(struct nouveau_object *, bool); +--- a/drivers/gpu/drm/nouveau/core/subdev/mc/base.c ++++ b/drivers/gpu/drm/nouveau/core/subdev/mc/base.c +@@ -80,7 +80,9 @@ _nouveau_mc_dtor(struct nouveau_object * + + int + nouveau_mc_create_(struct nouveau_object *parent, struct nouveau_object *engine, +- struct nouveau_oclass *oclass, int length, void **pobject) ++ struct nouveau_oclass *oclass, ++ const struct nouveau_mc_intr *intr_map, ++ int length, void **pobject) + { + struct nouveau_device *device = nv_device(parent); + struct nouveau_mc *pmc; +@@ -92,6 +94,8 @@ nouveau_mc_create_(struct nouveau_object + if (ret) + return ret; + ++ pmc->intr_map = intr_map; ++ + ret = request_irq(device->pdev->irq, nouveau_mc_intr, + IRQF_SHARED, "nouveau", pmc); + if (ret < 0) +--- a/drivers/gpu/drm/nouveau/core/subdev/mc/nv04.c ++++ b/drivers/gpu/drm/nouveau/core/subdev/mc/nv04.c +@@ -50,12 +50,11 @@ nv04_mc_ctor(struct nouveau_object *pare + struct nv04_mc_priv *priv; + int ret; + +- ret = nouveau_mc_create(parent, engine, oclass, &priv); ++ ret = nouveau_mc_create(parent, engine, oclass, nv04_mc_intr, &priv); + *pobject = nv_object(priv); + if (ret) + return ret; + +- priv->base.intr_map = nv04_mc_intr; + return 0; + } + +--- a/drivers/gpu/drm/nouveau/core/subdev/mc/nv44.c ++++ b/drivers/gpu/drm/nouveau/core/subdev/mc/nv44.c +@@ -36,12 +36,11 @@ nv44_mc_ctor(struct nouveau_object *pare + struct nv44_mc_priv *priv; + int ret; + +- ret = nouveau_mc_create(parent, engine, oclass, &priv); ++ ret = nouveau_mc_create(parent, engine, oclass, nv04_mc_intr, &priv); + *pobject = nv_object(priv); + if (ret) + return ret; + +- priv->base.intr_map = nv04_mc_intr; + return 0; + } + +--- a/drivers/gpu/drm/nouveau/core/subdev/mc/nv50.c ++++ b/drivers/gpu/drm/nouveau/core/subdev/mc/nv50.c +@@ -52,12 +52,11 @@ nv50_mc_ctor(struct nouveau_object *pare + struct nv50_mc_priv *priv; + int ret; + +- ret = nouveau_mc_create(parent, engine, oclass, &priv); ++ ret = nouveau_mc_create(parent, engine, oclass, nv50_mc_intr, &priv); + *pobject = nv_object(priv); + if (ret) + return ret; + +- priv->base.intr_map = nv50_mc_intr; + return 0; + } + +--- a/drivers/gpu/drm/nouveau/core/subdev/mc/nv98.c ++++ b/drivers/gpu/drm/nouveau/core/subdev/mc/nv98.c +@@ -54,12 +54,11 @@ nv98_mc_ctor(struct nouveau_object *pare + struct nv98_mc_priv *priv; + int ret; + +- ret = nouveau_mc_create(parent, engine, oclass, &priv); ++ ret = nouveau_mc_create(parent, engine, oclass, nv98_mc_intr, &priv); + *pobject = nv_object(priv); + if (ret) + return ret; + +- priv->base.intr_map = nv98_mc_intr; + return 0; + } + +--- a/drivers/gpu/drm/nouveau/core/subdev/mc/nvc0.c ++++ b/drivers/gpu/drm/nouveau/core/subdev/mc/nvc0.c +@@ -56,12 +56,11 @@ nvc0_mc_ctor(struct nouveau_object *pare + struct nvc0_mc_priv *priv; + int ret; + +- ret = nouveau_mc_create(parent, engine, oclass, &priv); ++ ret = nouveau_mc_create(parent, engine, oclass, nvc0_mc_intr, &priv); + *pobject = nv_object(priv); + if (ret) + return ret; + +- priv->base.intr_map = nvc0_mc_intr; + return 0; + } + diff --git a/queue-3.10/series b/queue-3.10/series new file mode 100644 index 00000000000..968034465d6 --- /dev/null +++ b/queue-3.10/series @@ -0,0 +1 @@ +drm-nouveau-mc-fix-race-condition-between-constructor-and-request_irq.patch