From: Dave Airlie <airlied@redhat.com>
Date: Fri, 18 Oct 2024 05:17:50 +0000 (+1000)
Subject: Merge tag 'drm-xe-next-2024-10-17' of https://gitlab.freedesktop.org/drm/xe/kernel... 
X-Git-Tag: v6.13-rc1~122^2~17
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=0a4d0b2d9d84c7afb6a49a30ed947ed4bb0b64f1;p=thirdparty%2Fkernel%2Flinux.git

Merge tag 'drm-xe-next-2024-10-17' of https://gitlab.freedesktop.org/drm/xe/kernel into drm-next

UAPI Changes:
- (Implicit) Fix the exec unnecessary implicit fencing (Matt Brost)

Driver Changes:
- Fix an inverted if statement (Colin)
- Fixes around display d3cold vs non-d3cold runtime pm (Imre)
- A couple of scheduling fixes (Matt Brost)
- Increase a query timestamp witdh (Lucas)
- Move a timestamp read (Lucas)
- Tidy some code using multiple put_user() (Lucas)
- Fix an ufence signaling error (Nirmoy)
- Initialize the ufence.signalled field (Matt Auld)
- Display fb alignement work (Juha-Pekka)
- Disallow horisontal flip with tile4 + display20 (Juha-Pekka)
- Extend a workaround (Shekhar)
- Enlarge the global invalidation timeout (Shuicheng)

Signed-off-by: Dave Airlie <airlied@redhat.com>

From: Thomas Hellstrom <thomas.hellstrom@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/ZxDZaRRQAzrG1uir@fedora
---

0a4d0b2d9d84c7afb6a49a30ed947ed4bb0b64f1
diff --cc drivers/gpu/drm/xe/display/xe_display.c
index ca00a365080fb,5c6b74c36b608..695c27ac6b0f8
--- a/drivers/gpu/drm/xe/display/xe_display.c
+++ b/drivers/gpu/drm/xe/display/xe_display.c
@@@ -344,7 -340,10 +344,10 @@@ static void __xe_display_pm_suspend(str
  
  	intel_opregion_suspend(display, s2idle ? PCI_D1 : PCI_D3cold);
  
 -	intel_dmc_suspend(xe);
 +	intel_dmc_suspend(display);
+ 
+ 	if (runtime && has_display(xe))
+ 		intel_hpd_poll_enable(xe);
  }
  
  void xe_display_pm_suspend(struct xe_device *xe)
@@@ -453,13 -452,14 +458,15 @@@ static void __xe_display_pm_resume(stru
  		intel_display_driver_resume(xe);
  		drm_kms_helper_poll_enable(&xe->drm);
  		intel_display_driver_enable_user_access(xe);
- 		intel_hpd_poll_disable(xe);
  	}
  
+ 	if (has_display(xe))
+ 		intel_hpd_poll_disable(xe);
+ 
  	intel_opregion_resume(display);
  
 -	intel_fbdev_set_suspend(&xe->drm, FBINFO_STATE_RUNNING, false);
 +	if (!runtime)
 +		intel_fbdev_set_suspend(&xe->drm, FBINFO_STATE_RUNNING, false);
  
  	intel_power_domains_enable(xe);
  }
diff --cc drivers/gpu/drm/xe/display/xe_fb_pin.c
index 79dbbbe03c7f6,9194993910e39..761510ae06904
--- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
+++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
@@@ -184,10 -190,10 +191,11 @@@ write_ggtt_rotated(struct xe_bo *bo, st
  
  static int __xe_pin_fb_vma_ggtt(const struct intel_framebuffer *fb,
  				const struct i915_gtt_view *view,
- 				struct i915_vma *vma)
+ 				struct i915_vma *vma,
+ 				u64 physical_alignment)
  {
 -	struct xe_bo *bo = intel_fb_obj(&fb->base);
 +	struct drm_gem_object *obj = intel_fb_bo(&fb->base);
 +	struct xe_bo *bo = gem_to_xe_bo(obj);
  	struct xe_device *xe = to_xe_device(fb->base.dev);
  	struct xe_ggtt *ggtt = xe_device_get_root_tile(xe)->mem.ggtt;
  	u32 align;
@@@ -369,9 -375,11 +378,12 @@@ void intel_fb_unpin_vma(struct i915_vm
  int intel_plane_pin_fb(struct intel_plane_state *plane_state)
  {
  	struct drm_framebuffer *fb = plane_state->hw.fb;
 -	struct xe_bo *bo = intel_fb_obj(fb);
 +	struct drm_gem_object *obj = intel_fb_bo(fb);
 +	struct xe_bo *bo = gem_to_xe_bo(obj);
  	struct i915_vma *vma;
+ 	struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
+ 	struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
+ 	u64 phys_alignment = plane->min_alignment(plane, fb, 0);
  
  	/* We reject creating !SCANOUT fb's, so this is weird.. */
  	drm_WARN_ON(bo->ttm.base.dev, !(bo->flags & XE_BO_FLAG_SCANOUT));
diff --cc drivers/gpu/drm/xe/xe_bo_types.h
index 8b92017750816,35372c46edfa5..13c6d8a69e916
--- a/drivers/gpu/drm/xe/xe_bo_types.h
+++ b/drivers/gpu/drm/xe/xe_bo_types.h
@@@ -76,6 -76,14 +76,11 @@@ struct xe_bo 
  
  	/** @vram_userfault_link: Link into @mem_access.vram_userfault.list */
  		struct list_head vram_userfault_link;
+ 
+ 	/** @min_align: minimum alignment needed for this BO if different
+ 	 * from default
+ 	 */
+ 	u64 min_align;
  };
  
 -#define intel_bo_to_drm_bo(bo) (&(bo)->ttm.base)
 -#define intel_bo_to_i915(bo) to_i915(intel_bo_to_drm_bo(bo)->dev)
 -
  #endif