From: Richard Earnshaw Date: Fri, 8 Dec 2023 16:04:17 +0000 (+0000) Subject: Revert "arm: vld1_types_x3 ACLE intrinsics" X-Git-Tag: basepoints/gcc-15~3811 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=0a80a35df3446c936205a768ed0cd93bf8e0f43b;p=thirdparty%2Fgcc.git Revert "arm: vld1_types_x3 ACLE intrinsics" This reverts commit 8e3ae874b21bdd8da32afefa6f6f60913481564c. --- diff --git a/gcc/config/arm/arm_neon.h b/gcc/config/arm/arm_neon.h index dbc37cafe286..669b8fffb405 100644 --- a/gcc/config/arm/arm_neon.h +++ b/gcc/config/arm/arm_neon.h @@ -10316,15 +10316,6 @@ vld1_p64_x2 (const poly64_t * __a) return __rv.__i; } -__extension__ extern __inline poly64x1x3_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -vld1_p64_x3 (const poly64_t * __a) -{ - union { poly64x1x3_t __i; __builtin_neon_ei __o; } __rv; - __rv.__o = __builtin_neon_vld1_x3di ((const __builtin_neon_di *) __a); - return __rv.__i; -} - #pragma GCC pop_options __extension__ extern __inline int8x8_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) @@ -10390,42 +10381,6 @@ vld1_s64_x2 (const int64_t * __a) return __rv.__i; } -__extension__ extern __inline int8x8x3_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -vld1_s8_x3 (const int8_t * __a) -{ - union { int8x8x3_t __i; __builtin_neon_ei __o; } __rv; - __rv.__o = __builtin_neon_vld1_x3v8qi ((const __builtin_neon_qi *) __a); - return __rv.__i; -} - -__extension__ extern __inline int16x4x3_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -vld1_s16_x3 (const int16_t * __a) -{ - union { int16x4x3_t __i; __builtin_neon_ei __o; } __rv; - __rv.__o = __builtin_neon_vld1_x3v4hi ((const __builtin_neon_hi *) __a); - return __rv.__i; -} - -__extension__ extern __inline int32x2x3_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -vld1_s32_x3 (const int32_t * __a) -{ - union { int32x2x3_t __i; __builtin_neon_ei __o; } __rv; - __rv.__o = __builtin_neon_vld1_x3v2si ((const __builtin_neon_si *) __a); - return __rv.__i; -} - -__extension__ extern __inline int64x1x3_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -vld1_s64_x3 (const int64_t * __a) -{ - union { int64x1x3_t __i; __builtin_neon_ei __o; } __rv; - __rv.__o = __builtin_neon_vld1_x3di ((const __builtin_neon_di *) __a); - return __rv.__i; -} - #if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE) __extension__ extern __inline float16x4_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) @@ -10462,26 +10417,6 @@ vld1_f32_x2 (const float32_t * __a) return __rv.__i; } -#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE) -__extension__ extern __inline float16x4x3_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -vld1_f16_x3 (const float16_t * __a) -{ - union { float16x4x3_t __i; __builtin_neon_ei __o; } __rv; - __rv.__o = __builtin_neon_vld1_x3v4hf (__a); - return __rv.__i; -} -#endif - -__extension__ extern __inline float32x2x3_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -vld1_f32_x3 (const float32_t * __a) -{ - union { float32x2x3_t __i; __builtin_neon_ei __o; } __rv; - __rv.__o = __builtin_neon_vld1_x3v2sf ((const __builtin_neon_sf *) __a); - return __rv.__i; -} - __extension__ extern __inline uint8x8_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) vld1_u8 (const uint8_t * __a) @@ -10546,42 +10481,6 @@ vld1_u64_x2 (const uint64_t * __a) return __rv.__i; } -__extension__ extern __inline uint8x8x3_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -vld1_u8_x3 (const uint8_t * __a) -{ - union { uint8x8x3_t __i; __builtin_neon_ei __o; } __rv; - __rv.__o = __builtin_neon_vld1_x3v8qi ((const __builtin_neon_qi *) __a); - return __rv.__i; -} - -__extension__ extern __inline uint16x4x3_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -vld1_u16_x3 (const uint16_t * __a) -{ - union { uint16x4x3_t __i; __builtin_neon_ei __o; } __rv; - __rv.__o = __builtin_neon_vld1_x3v4hi ((const __builtin_neon_hi *) __a); - return __rv.__i; -} - -__extension__ extern __inline uint32x2x3_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -vld1_u32_x3 (const uint32_t * __a) -{ - union { uint32x2x3_t __i; __builtin_neon_ei __o; } __rv; - __rv.__o = __builtin_neon_vld1_x3v2si ((const __builtin_neon_si *) __a); - return __rv.__i; -} - -__extension__ extern __inline uint64x1x3_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -vld1_u64_x3 (const uint64_t * __a) -{ - union { uint64x1x3_t __i; __builtin_neon_ei __o; } __rv; - __rv.__o = __builtin_neon_vld1_x3di ((const __builtin_neon_di *) __a); - return __rv.__i; -} - __extension__ extern __inline poly8x8_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) vld1_p8 (const poly8_t * __a) @@ -10614,24 +10513,6 @@ vld1_p16_x2 (const poly16_t * __a) return __rv.__i; } -__extension__ extern __inline poly8x8x3_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -vld1_p8_x3 (const poly8_t * __a) -{ - union { poly8x8x3_t __i; __builtin_neon_ei __o; } __rv; - __rv.__o = __builtin_neon_vld1_x3v8qi ((const __builtin_neon_qi *) __a); - return __rv.__i; -} - -__extension__ extern __inline poly16x4x3_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -vld1_p16_x3 (const poly16_t * __a) -{ - union { poly16x4x3_t __i; __builtin_neon_ei __o; } __rv; - __rv.__o = __builtin_neon_vld1_x3v4hi ((const __builtin_neon_hi *) __a); - return __rv.__i; -} - #pragma GCC push_options #pragma GCC target ("fpu=crypto-neon-fp-armv8") __extension__ extern __inline poly64x2_t @@ -10655,7 +10536,7 @@ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) vld1q_p64_x3 (const poly64_t * __a) { union { poly64x2x3_t __i; __builtin_neon_ci __o; } __rv; - __rv.__o = __builtin_neon_vld1q_x3v2di ((const __builtin_neon_di *) __a); + __rv.__o = __builtin_neon_vld1_x3v2di ((const __builtin_neon_di *) __a); return __rv.__i; } @@ -10738,7 +10619,7 @@ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) vld1q_s8_x3 (const uint8_t * __a) { union { int8x16x3_t __i; __builtin_neon_ci __o; } __rv; - __rv.__o = __builtin_neon_vld1q_x3v16qi ((const __builtin_neon_qi *) __a); + __rv.__o = __builtin_neon_vld1_x3v16qi ((const __builtin_neon_qi *) __a); return __rv.__i; } @@ -10747,7 +10628,7 @@ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) vld1q_s16_x3 (const uint16_t * __a) { union { int16x8x3_t __i; __builtin_neon_ci __o; } __rv; - __rv.__o = __builtin_neon_vld1q_x3v8hi ((const __builtin_neon_hi *) __a); + __rv.__o = __builtin_neon_vld1_x3v8hi ((const __builtin_neon_hi *) __a); return __rv.__i; } @@ -10756,7 +10637,7 @@ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) vld1q_s32_x3 (const int32_t * __a) { union { int32x4x3_t __i; __builtin_neon_ci __o; } __rv; - __rv.__o = __builtin_neon_vld1q_x3v4si ((const __builtin_neon_si *) __a); + __rv.__o = __builtin_neon_vld1_x3v4si ((const __builtin_neon_si *) __a); return __rv.__i; } @@ -10765,7 +10646,7 @@ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) vld1q_s64_x3 (const int64_t * __a) { union { int64x2x3_t __i; __builtin_neon_ci __o; } __rv; - __rv.__o = __builtin_neon_vld1q_x3v2di ((const __builtin_neon_di *) __a); + __rv.__o = __builtin_neon_vld1_x3v2di ((const __builtin_neon_di *) __a); return __rv.__i; } @@ -10847,7 +10728,7 @@ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) vld1q_f16_x3 (const float16_t * __a) { union { float16x8x3_t __i; __builtin_neon_ci __o; } __rv; - __rv.__o = __builtin_neon_vld1q_x3v8hf (__a); + __rv.__o = __builtin_neon_vld1_x3v8hf (__a); return __rv.__i; } #endif @@ -10857,7 +10738,7 @@ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) vld1q_f32_x3 (const float32_t * __a) { union { float32x4x3_t __i; __builtin_neon_ci __o; } __rv; - __rv.__o = __builtin_neon_vld1q_x3v4sf ((const __builtin_neon_sf *) __a); + __rv.__o = __builtin_neon_vld1_x3v4sf ((const __builtin_neon_sf *) __a); return __rv.__i; } @@ -10950,7 +10831,7 @@ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) vld1q_u8_x3 (const uint8_t * __a) { union { uint8x16x3_t __i; __builtin_neon_ci __o; } __rv; - __rv.__o = __builtin_neon_vld1q_x3v16qi ((const __builtin_neon_qi *) __a); + __rv.__o = __builtin_neon_vld1_x3v16qi ((const __builtin_neon_qi *) __a); return __rv.__i; } @@ -10959,7 +10840,7 @@ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) vld1q_u16_x3 (const uint16_t * __a) { union { uint16x8x3_t __i; __builtin_neon_ci __o; } __rv; - __rv.__o = __builtin_neon_vld1q_x3v8hi ((const __builtin_neon_hi *) __a); + __rv.__o = __builtin_neon_vld1_x3v8hi ((const __builtin_neon_hi *) __a); return __rv.__i; } @@ -10968,7 +10849,7 @@ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) vld1q_u32_x3 (const uint32_t * __a) { union { uint32x4x3_t __i; __builtin_neon_ci __o; } __rv; - __rv.__o = __builtin_neon_vld1q_x3v4si ((const __builtin_neon_si *) __a); + __rv.__o = __builtin_neon_vld1_x3v4si ((const __builtin_neon_si *) __a); return __rv.__i; } @@ -10977,7 +10858,7 @@ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) vld1q_u64_x3 (const uint64_t * __a) { union { uint64x2x3_t __i; __builtin_neon_ci __o; } __rv; - __rv.__o = __builtin_neon_vld1q_x3v2di ((const __builtin_neon_di *) __a); + __rv.__o = __builtin_neon_vld1_x3v2di ((const __builtin_neon_di *) __a); return __rv.__i; } @@ -11054,7 +10935,7 @@ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) vld1q_p8_x3 (const poly8_t * __a) { union { poly8x16x3_t __i; __builtin_neon_ci __o; } __rv; - __rv.__o = __builtin_neon_vld1q_x3v16qi ((const __builtin_neon_qi *) __a); + __rv.__o = __builtin_neon_vld1_x3v16qi ((const __builtin_neon_qi *) __a); return __rv.__i; } @@ -11063,7 +10944,7 @@ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) vld1q_p16_x3 (const poly16_t * __a) { union { poly16x8x3_t __i; __builtin_neon_ci __o; } __rv; - __rv.__o = __builtin_neon_vld1q_x3v8hi ((const __builtin_neon_hi *) __a); + __rv.__o = __builtin_neon_vld1_x3v8hi ((const __builtin_neon_hi *) __a); return __rv.__i; } @@ -21063,15 +20944,6 @@ vld1_bf16_x2 (const bfloat16_t * __ptr) return __rv.__i; } -__extension__ extern __inline bfloat16x4x3_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -vld1_bf16_x3 (const bfloat16_t * __ptr) -{ - union { bfloat16x4x3_t __i; __builtin_neon_ei __o; } __rv; - __rv.__o = __builtin_neon_vld1_x3v4bf ((const __builtin_neon_bf *) __ptr); - return __rv.__i; -} - __extension__ extern __inline bfloat16x8_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) vld1q_bf16 (const bfloat16_t * __ptr) @@ -21093,7 +20965,7 @@ __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) vld1q_bf16_x3 (const bfloat16_t * __ptr) { union { bfloat16x8x3_t __i; __builtin_neon_oi __o; } __rv; - __rv.__o = __builtin_neon_vld1q_x3v8bf ((const __builtin_neon_bf *) __ptr); + __rv.__o = __builtin_neon_vld1_x3v8bf ((const __builtin_neon_bf *) __ptr); return __rv.__i; } diff --git a/gcc/config/arm/arm_neon_builtins.def b/gcc/config/arm/arm_neon_builtins.def index c74f0db645bd..07750c03c087 100644 --- a/gcc/config/arm/arm_neon_builtins.def +++ b/gcc/config/arm/arm_neon_builtins.def @@ -303,8 +303,7 @@ VAR13 (LOAD1, vld1, v4bf, v8bf) VAR7 (LOAD1, vld1_x2, v8qi, v4hi, v2si, di, v4hf, v2sf, v4bf) VAR7 (LOAD1, vld1q_x2, v16qi, v8hi, v4si, v2di, v8hf, v4sf, v8bf) -VAR7 (LOAD1, vld1_x3, v8qi, v4hi, v2si, di, v4hf, v2sf, v4bf) -VAR7 (LOAD1, vld1q_x3, v16qi, v8hi, v4si, v2di, v8hf, v4sf, v8bf) +VAR7 (LOAD1, vld1_x3, v16qi, v8hi, v4si, v2di, v8hf, v4sf, v8bf) VAR7 (LOAD1, vld1_x4, v16qi, v8hi, v4si, v2di, v8hf, v4sf, v8bf) VAR12 (LOAD1LANE, vld1_lane, v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di, v4bf, v8bf) diff --git a/gcc/config/arm/neon.md b/gcc/config/arm/neon.md index e67cbc247d9a..75add42777d8 100644 --- a/gcc/config/arm/neon.md +++ b/gcc/config/arm/neon.md @@ -4968,16 +4968,6 @@ if (BYTES_BIG_ENDIAN) ) (define_insn "neon_vld1_x3" - [(set (match_operand:EI 0 "s_register_operand" "=w") - (unspec:EI [(match_operand:EI 1 "neon_struct_operand" "Um") - (unspec:VDQX [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] - UNSPEC_VLD1))] - "TARGET_NEON" - "vld1.\t%h0, %A1" - [(set_attr "type" "neon_load1_3reg")] -) - -(define_insn "neon_vld1q_x3" [(set (match_operand:CI 0 "s_register_operand" "=w") (unspec:CI [(match_operand:EI 1 "neon_struct_operand" "Um") (unspec:VQXBF [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] diff --git a/gcc/testsuite/gcc.target/arm/simd/vld1_base_xN_1.c b/gcc/testsuite/gcc.target/arm/simd/vld1_base_xN_1.c index 95314bbe0ded..6b0e78d94d7c 100644 --- a/gcc/testsuite/gcc.target/arm/simd/vld1_base_xN_1.c +++ b/gcc/testsuite/gcc.target/arm/simd/vld1_base_xN_1.c @@ -60,62 +60,7 @@ poly16x4x2_t test_vld1_p16_x2 (poly16_t * a) return vld1_p16_x2 (a); } -uint8x8x3_t test_vld1_u8_x3 (uint8_t * a) -{ - return vld1_u8_x3 (a); -} - -uint16x4x3_t test_vld1_u16_x3 (uint16_t * a) -{ - return vld1_u16_x3 (a); -} - -uint32x2x3_t test_vld1_u32_x3 (uint32_t * a) -{ - return vld1_u32_x3 (a); -} - -uint64x1x3_t test_vld1_u64_x3 (uint64_t * a) -{ - return vld1_u64_x3 (a); -} - -int8x8x3_t test_vld1_s8_x3 (int8_t * a) -{ - return vld1_s8_x3 (a); -} - -int16x4x3_t test_vld1_s16_x3 (int16_t * a) -{ - return vld1_s16_x3 (a); -} - -int32x2x3_t test_vld1_s32_x3 (int32_t * a) -{ - return vld1_s32_x3 (a); -} - -int64x1x3_t test_vld1_s64_x3 (int64_t * a) -{ - return vld1_s64_x3 (a); -} - -float32x2x3_t test_vld1_f32_x3 (float32_t * a) -{ - return vld1_f32_x3 (a); -} - -poly8x8x3_t test_vld1_p8_x3 (poly8_t * a) -{ - return vld1_p8_x3 (a); -} - -poly16x4x3_t test_vld1_p16_x3 (poly16_t * a) -{ - return vld1_p16_x3 (a); -} - -/* { dg-final { scan-assembler-times {vld1.8\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 6 } } */ -/* { dg-final { scan-assembler-times {vld1.16\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 6 } } */ -/* { dg-final { scan-assembler-times {vld1.32\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 6 } } */ -/* { dg-final { scan-assembler-times {vld1.64\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+:64\]\n} 4 } } */ \ No newline at end of file +/* { dg-final { scan-assembler-times {vld1.8\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 3 } } */ +/* { dg-final { scan-assembler-times {vld1.16\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 3 } } */ +/* { dg-final { scan-assembler-times {vld1.32\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 3 } } */ +/* { dg-final { scan-assembler-times {vld1.64\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+:64\]\n} 2 } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/simd/vld1_bf16_xN_1.c b/gcc/testsuite/gcc.target/arm/simd/vld1_bf16_xN_1.c index c1935da0a4c7..3ec7a5e19864 100644 --- a/gcc/testsuite/gcc.target/arm/simd/vld1_bf16_xN_1.c +++ b/gcc/testsuite/gcc.target/arm/simd/vld1_bf16_xN_1.c @@ -10,9 +10,4 @@ bfloat16x4x2_t test_vld1_bf16_x2 (bfloat16_t * a) return vld1_bf16_x2 (a); } -bfloat16x4x3_t test_vld1_bf16_x3 (bfloat16_t * a) -{ - return vld1_bf16_x3 (a); -} - -/* { dg-final { scan-assembler-times {vld1.16\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 2 } } */ \ No newline at end of file +/* { dg-final { scan-assembler-times {vld1.16\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 1 } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/simd/vld1_fp16_xN_1.c b/gcc/testsuite/gcc.target/arm/simd/vld1_fp16_xN_1.c index 20363239f5b4..c0e5ea491424 100644 --- a/gcc/testsuite/gcc.target/arm/simd/vld1_fp16_xN_1.c +++ b/gcc/testsuite/gcc.target/arm/simd/vld1_fp16_xN_1.c @@ -10,9 +10,4 @@ float16x4x2_t test_vld1_f16_x2 (float16_t * a) return vld1_f16_x2 (a); } -float16x4x3_t test_vld1_f16_x3 (float16_t * a) -{ - return vld1_f16_x3 (a); -} - -/* { dg-final { scan-assembler-times {vld1.16\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 2 } } */ +/* { dg-final { scan-assembler-times {vld1.16\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 1 } } */ diff --git a/gcc/testsuite/gcc.target/arm/simd/vld1_p64_xN_1.c b/gcc/testsuite/gcc.target/arm/simd/vld1_p64_xN_1.c index 210de511c716..3ccea520ddc2 100644 --- a/gcc/testsuite/gcc.target/arm/simd/vld1_p64_xN_1.c +++ b/gcc/testsuite/gcc.target/arm/simd/vld1_p64_xN_1.c @@ -10,9 +10,4 @@ poly64x1x2_t test_vld1_p64_x2 (poly64_t * a) return vld1_p64_x2 (a); } -poly64x1x3_t test_vld1_p64_x3 (poly64_t * a) -{ - return vld1_p64_x3 (a); -} - -/* { dg-final { scan-assembler-times {vld1.64\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+:64\]\n} 2 } } */ +/* { dg-final { scan-assembler-times {vld1.64\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+:64\]\n} 1 } } */