From: Victor CLEMENT Date: Tue, 2 Jun 2015 13:56:23 +0000 (+0100) Subject: pl061: fix wrong calculation of GPIOMIS register X-Git-Tag: v2.4.0-rc0~102^2~7 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=0b2ff2ceb8a45cbe51ca13a1a32fc5bdeec71815;p=thirdparty%2Fqemu.git pl061: fix wrong calculation of GPIOMIS register The masked interrupt status register should be the state of the interrupt after masking. There should be a logical AND instead of a logical OR between the interrupt status and the interrupt mask. Signed-off-by: Victor CLEMENT Reviewed-by: Peter Crosthwaite Message-id: 1433154824-6927-1-git-send-email-victor.clement@openwide.fr Signed-off-by: Peter Maydell --- diff --git a/hw/gpio/pl061.c b/hw/gpio/pl061.c index bd03e999751..4ba730b4764 100644 --- a/hw/gpio/pl061.c +++ b/hw/gpio/pl061.c @@ -173,7 +173,7 @@ static uint64_t pl061_read(void *opaque, hwaddr offset, case 0x414: /* Raw interrupt status */ return s->istate; case 0x418: /* Masked interrupt status */ - return s->istate | s->im; + return s->istate & s->im; case 0x420: /* Alternate function select */ return s->afsel; case 0x500: /* 2mA drive */