From: Greg Kroah-Hartman Date: Wed, 19 Feb 2025 07:03:41 +0000 (+0100) Subject: 5.4-stable patches X-Git-Tag: v6.1.129~17 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=0bc8364eccd306b65ea62ebfca9a22747e4d25d4;p=thirdparty%2Fkernel%2Fstable-queue.git 5.4-stable patches added patches: can-ems_pci-move-asix-ax99100-ids-to-pci_ids.h.patch parport_pc-add-support-for-asix-ax99100.patch serial-8250_pci-add-support-for-asix-ax99100.patch x86-i8253-disable-pit-timer-0-when-not-in-use.patch --- diff --git a/queue-5.4/can-ems_pci-move-asix-ax99100-ids-to-pci_ids.h.patch b/queue-5.4/can-ems_pci-move-asix-ax99100-ids-to-pci_ids.h.patch new file mode 100644 index 0000000000..a9d31b241d --- /dev/null +++ b/queue-5.4/can-ems_pci-move-asix-ax99100-ids-to-pci_ids.h.patch @@ -0,0 +1,38 @@ +From 3029ad91335353a70feb42acd24d580d70ab258b Mon Sep 17 00:00:00 2001 +From: Jiaqing Zhao +Date: Mon, 24 Jul 2023 08:39:31 +0000 +Subject: can: ems_pci: move ASIX AX99100 ids to pci_ids.h + +From: Jiaqing Zhao + +commit 3029ad91335353a70feb42acd24d580d70ab258b upstream. + +Move PCI Vendor and Device ID of ASIX AX99100 PCIe to Multi I/O +Controller to pci_ids.h for its serial and parallel port driver +support in subsequent patches. + +Signed-off-by: Jiaqing Zhao +Reviewed-by: Andy Shevchenko +Acked-by: Bjorn Helgaas +Acked-by: Marc Kleine-Budde +Link: https://lore.kernel.org/r/20230724083933.3173513-3-jiaqing.zhao@linux.intel.com +[Moeko: Drop changes in drivers/net/can/sja1000/ems_pci.c] +Signed-off-by: Tomita Moeko +Signed-off-by: Greg Kroah-Hartman +--- + include/linux/pci_ids.h | 4 ++++ + 1 file changed, 4 insertions(+) + +--- a/include/linux/pci_ids.h ++++ b/include/linux/pci_ids.h +@@ -1764,6 +1764,10 @@ + #define PCI_SUBDEVICE_ID_AT_2700FX 0x2701 + #define PCI_SUBDEVICE_ID_AT_2701FX 0x2703 + ++#define PCI_VENDOR_ID_ASIX 0x125b ++#define PCI_DEVICE_ID_ASIX_AX99100 0x9100 ++#define PCI_DEVICE_ID_ASIX_AX99100_LB 0x9110 ++ + #define PCI_VENDOR_ID_ESS 0x125d + #define PCI_DEVICE_ID_ESS_ESS1968 0x1968 + #define PCI_DEVICE_ID_ESS_ESS1978 0x1978 diff --git a/queue-5.4/parport_pc-add-support-for-asix-ax99100.patch b/queue-5.4/parport_pc-add-support-for-asix-ax99100.patch new file mode 100644 index 0000000000..b971c6a67c --- /dev/null +++ b/queue-5.4/parport_pc-add-support-for-asix-ax99100.patch @@ -0,0 +1,52 @@ +From 16aae4c64600a6319a6f10dbff833fa198bf9599 Mon Sep 17 00:00:00 2001 +From: Jiaqing Zhao +Date: Mon, 24 Jul 2023 08:39:33 +0000 +Subject: parport_pc: add support for ASIX AX99100 + +From: Jiaqing Zhao + +commit 16aae4c64600a6319a6f10dbff833fa198bf9599 upstream. + +The PCI function 2 on ASIX AX99100 PCIe to Multi I/O Controller can be +configured as a single-port parallel port controller. The subvendor id +is 0x2000 when configured as parallel port. It supports IEEE-1284 EPP / +ECP with its ECR on BAR1. + +Signed-off-by: Jiaqing Zhao +Reviewed-by: Andy Shevchenko +Acked-by: Sudip Mukherjee +Link: https://lore.kernel.org/r/20230724083933.3173513-5-jiaqing.zhao@linux.intel.com +Signed-off-by: Tomita Moeko +Signed-off-by: Greg Kroah-Hartman +--- + drivers/parport/parport_pc.c | 5 +++++ + 1 file changed, 5 insertions(+) + +--- a/drivers/parport/parport_pc.c ++++ b/drivers/parport/parport_pc.c +@@ -2624,6 +2624,7 @@ enum parport_pc_pci_cards { + netmos_9815, + netmos_9901, + netmos_9865, ++ asix_ax99100, + quatech_sppxp100, + wch_ch382l, + brainboxes_uc146, +@@ -2689,6 +2690,7 @@ static struct parport_pc_pci { + /* netmos_9815 */ { 2, { { 0, 1 }, { 2, 3 }, } }, + /* netmos_9901 */ { 1, { { 0, -1 }, } }, + /* netmos_9865 */ { 1, { { 0, -1 }, } }, ++ /* asix_ax99100 */ { 1, { { 0, 1 }, } }, + /* quatech_sppxp100 */ { 1, { { 0, 1 }, } }, + /* wch_ch382l */ { 1, { { 2, -1 }, } }, + /* brainboxes_uc146 */ { 1, { { 3, -1 }, } }, +@@ -2779,6 +2781,9 @@ static const struct pci_device_id parpor + 0xA000, 0x1000, 0, 0, netmos_9865 }, + { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9865, + 0xA000, 0x2000, 0, 0, netmos_9865 }, ++ /* ASIX AX99100 PCIe to Multi I/O Controller */ ++ { PCI_VENDOR_ID_ASIX, PCI_DEVICE_ID_ASIX_AX99100, ++ 0xA000, 0x2000, 0, 0, asix_ax99100 }, + /* Quatech SPPXP-100 Parallel port PCI ExpressCard */ + { PCI_VENDOR_ID_QUATECH, PCI_DEVICE_ID_QUATECH_SPPXP_100, + PCI_ANY_ID, PCI_ANY_ID, 0, 0, quatech_sppxp100 }, diff --git a/queue-5.4/serial-8250_pci-add-support-for-asix-ax99100.patch b/queue-5.4/serial-8250_pci-add-support-for-asix-ax99100.patch new file mode 100644 index 0000000000..41da6e6216 --- /dev/null +++ b/queue-5.4/serial-8250_pci-add-support-for-asix-ax99100.patch @@ -0,0 +1,49 @@ +From 0b32216557ce3b2a468d1282d99b428bf72ff532 Mon Sep 17 00:00:00 2001 +From: Jiaqing Zhao +Date: Mon, 24 Jul 2023 08:39:32 +0000 +Subject: serial: 8250_pci: add support for ASIX AX99100 + +From: Jiaqing Zhao + +commit 0b32216557ce3b2a468d1282d99b428bf72ff532 upstream. + +Each of the 4 PCI functions on ASIX AX99100 PCIe to Multi I/O +Controller can be configured as a single-port serial port controller. +The subvendor id is 0x1000 when configured as serial port and MSI +interrupts are supported. + +Signed-off-by: Jiaqing Zhao +Reviewed-by: Andy Shevchenko +Link: https://lore.kernel.org/r/20230724083933.3173513-4-jiaqing.zhao@linux.intel.com +Signed-off-by: Tomita Moeko +Signed-off-by: Greg Kroah-Hartman +--- + drivers/tty/serial/8250/8250_pci.c | 10 ++++++++++ + 1 file changed, 10 insertions(+) + +--- a/drivers/tty/serial/8250/8250_pci.c ++++ b/drivers/tty/serial/8250/8250_pci.c +@@ -67,6 +67,8 @@ static const struct pci_device_id pci_us + 0xA000, 0x1000) }, + { PCI_DEVICE_SUB(PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9922, + 0xA000, 0x1000) }, ++ { PCI_DEVICE_SUB(PCI_VENDOR_ID_ASIX, PCI_DEVICE_ID_ASIX_AX99100, ++ 0xA000, 0x1000) }, + { PCI_DEVICE_SUB(PCI_VENDOR_ID_HP_3PAR, PCI_DEVICE_ID_HPE_PCI_SERIAL, + PCI_ANY_ID, PCI_ANY_ID) }, + { } +@@ -5757,6 +5759,14 @@ static const struct pci_device_id serial + { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9865, + 0xA000, 0x3004, + 0, 0, pbn_b0_bt_4_115200 }, ++ ++ /* ++ * ASIX AX99100 PCIe to Multi I/O Controller ++ */ ++ { PCI_VENDOR_ID_ASIX, PCI_DEVICE_ID_ASIX_AX99100, ++ 0xA000, 0x1000, ++ 0, 0, pbn_b0_1_115200 }, ++ + /* Intel CE4100 */ + { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CE4100_UART, + PCI_ANY_ID, PCI_ANY_ID, 0, 0, diff --git a/queue-5.4/series b/queue-5.4/series index db458cf534..6da2e6d68f 100644 --- a/queue-5.4/series +++ b/queue-5.4/series @@ -206,3 +206,7 @@ alpha-replace-hardcoded-stack-offsets-with-autogenerated-ones.patch nilfs2-do-not-output-warnings-when-clearing-dirty-buffers.patch nilfs2-do-not-force-clear-folio-if-buffer-is-referenced.patch nilfs2-protect-access-to-buffers-with-no-active-references.patch +can-ems_pci-move-asix-ax99100-ids-to-pci_ids.h.patch +serial-8250_pci-add-support-for-asix-ax99100.patch +parport_pc-add-support-for-asix-ax99100.patch +x86-i8253-disable-pit-timer-0-when-not-in-use.patch diff --git a/queue-5.4/x86-i8253-disable-pit-timer-0-when-not-in-use.patch b/queue-5.4/x86-i8253-disable-pit-timer-0-when-not-in-use.patch new file mode 100644 index 0000000000..61180b12d9 --- /dev/null +++ b/queue-5.4/x86-i8253-disable-pit-timer-0-when-not-in-use.patch @@ -0,0 +1,96 @@ +From 70e6b7d9ae3c63df90a7bba7700e8d5c300c3c60 Mon Sep 17 00:00:00 2001 +From: David Woodhouse +Date: Fri, 2 Aug 2024 14:55:54 +0100 +Subject: x86/i8253: Disable PIT timer 0 when not in use + +From: David Woodhouse + +commit 70e6b7d9ae3c63df90a7bba7700e8d5c300c3c60 upstream. + +Leaving the PIT interrupt running can cause noticeable steal time for +virtual guests. The VMM generally has a timer which toggles the IRQ input +to the PIC and I/O APIC, which takes CPU time away from the guest. Even +on real hardware, running the counter may use power needlessly (albeit +not much). + +Make sure it's turned off if it isn't going to be used. + +Signed-off-by: David Woodhouse +Signed-off-by: Thomas Gleixner +Tested-by: Michael Kelley +Link: https://lore.kernel.org/all/20240802135555.564941-1-dwmw2@infradead.org +Signed-off-by: Greg Kroah-Hartman +--- + arch/x86/kernel/i8253.c | 11 +++++++++-- + drivers/clocksource/i8253.c | 13 +++++++++---- + include/linux/i8253.h | 1 + + 3 files changed, 19 insertions(+), 6 deletions(-) + +--- a/arch/x86/kernel/i8253.c ++++ b/arch/x86/kernel/i8253.c +@@ -8,6 +8,7 @@ + #include + #include + ++#include + #include + #include + #include +@@ -39,9 +40,15 @@ static bool __init use_pit(void) + + bool __init pit_timer_init(void) + { +- if (!use_pit()) ++ if (!use_pit()) { ++ /* ++ * Don't just ignore the PIT. Ensure it's stopped, because ++ * VMMs otherwise steal CPU time just to pointlessly waggle ++ * the (masked) IRQ. ++ */ ++ clockevent_i8253_disable(); + return false; +- ++ } + clockevent_i8253_init(true); + global_clock_event = &i8253_clockevent; + return true; +--- a/drivers/clocksource/i8253.c ++++ b/drivers/clocksource/i8253.c +@@ -108,11 +108,8 @@ int __init clocksource_i8253_init(void) + #endif + + #ifdef CONFIG_CLKEVT_I8253 +-static int pit_shutdown(struct clock_event_device *evt) ++void clockevent_i8253_disable(void) + { +- if (!clockevent_state_oneshot(evt) && !clockevent_state_periodic(evt)) +- return 0; +- + raw_spin_lock(&i8253_lock); + + outb_p(0x30, PIT_MODE); +@@ -123,6 +120,14 @@ static int pit_shutdown(struct clock_eve + } + + raw_spin_unlock(&i8253_lock); ++} ++ ++static int pit_shutdown(struct clock_event_device *evt) ++{ ++ if (!clockevent_state_oneshot(evt) && !clockevent_state_periodic(evt)) ++ return 0; ++ ++ clockevent_i8253_disable(); + return 0; + } + +--- a/include/linux/i8253.h ++++ b/include/linux/i8253.h +@@ -24,6 +24,7 @@ extern raw_spinlock_t i8253_lock; + extern bool i8253_clear_counter_on_shutdown; + extern struct clock_event_device i8253_clockevent; + extern void clockevent_i8253_init(bool oneshot); ++extern void clockevent_i8253_disable(void); + + extern void setup_pit_timer(void); +