From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Date: Thu, 22 Dec 2022 15:13:19 +0000 (+0100)
Subject: arm64: dts: qcom: sdm845: do not customize SPI0 pin drive/bias
X-Git-Tag: v6.3-rc1~202^2~45^2~182
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=0cbc0b1c5838b02c67a768392bb34732f0d384b0;p=thirdparty%2Flinux.git

arm64: dts: qcom: sdm845: do not customize SPI0 pin drive/bias

Each board should define pin drive/bias for used busses.  All boards
using SPI0 (db845c and cheza) already do it, so drop the bias/drive
strength from SoC DTSI.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221222151319.122398-4-krzysztof.kozlowski@linaro.org
---

diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index 6a0b48486d36a..32fbfff09750c 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -2853,8 +2853,6 @@
 			qup_spi0_default: qup-spi0-default-state {
 				pins = "gpio0", "gpio1", "gpio2", "gpio3";
 				function = "qup0";
-				drive-strength = <6>;
-				bias-disable;
 			};
 
 			qup_spi1_default: qup-spi1-default-state {