From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Date: Sun, 5 Mar 2023 09:24:17 +0000 (+0100)
Subject: fix up microcode text in other queues
X-Git-Tag: v6.2.3~120
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=0d81ebdd678c16f1bbe021e279f3231481734274;p=thirdparty%2Fkernel%2Fstable-queue.git

fix up microcode text in other queues
---

diff --git a/queue-5.10/x86-microcode-check-cpu-capabilities-after-late-micr.patch b/queue-5.10/x86-microcode-check-cpu-capabilities-after-late-micr.patch
index ba867a1b07e..b2d57b7bcf9 100644
--- a/queue-5.10/x86-microcode-check-cpu-capabilities-after-late-micr.patch
+++ b/queue-5.10/x86-microcode-check-cpu-capabilities-after-late-micr.patch
@@ -17,14 +17,14 @@ comparing the values before and after the microcode update.
 Another example is X86_FEATURE_SRBDS_CTRL which gets added only after
 microcode update:
 
-  --- cpuid.before	2023-01-21 14:54:15.652000747 +0100
-  +++ cpuid.after	2023-01-21 14:54:26.632001024 +0100
-  @@ -10,7 +10,7 @@ CPU:
-      0x00000004 0x04: eax=0x00000000 ebx=0x00000000 ecx=0x00000000 edx=0x00000000
-      0x00000005 0x00: eax=0x00000040 ebx=0x00000040 ecx=0x00000003 edx=0x11142120
-      0x00000006 0x00: eax=0x000027f7 ebx=0x00000002 ecx=0x00000001 edx=0x00000000
-  -   0x00000007 0x00: eax=0x00000000 ebx=0x029c6fbf ecx=0x40000000 edx=0xbc002400
-  +   0x00000007 0x00: eax=0x00000000 ebx=0x029c6fbf ecx=0x40000000 edx=0xbc002e00
+#  --- cpuid.before	2023-01-21 14:54:15.652000747 +0100
+#  +++ cpuid.after	2023-01-21 14:54:26.632001024 +0100
+#  @@ -10,7 +10,7 @@ CPU:
+#      0x00000004 0x04: eax=0x00000000 ebx=0x00000000 ecx=0x00000000 edx=0x00000000
+#      0x00000005 0x00: eax=0x00000040 ebx=0x00000040 ecx=0x00000003 edx=0x11142120
+#      0x00000006 0x00: eax=0x000027f7 ebx=0x00000002 ecx=0x00000001 edx=0x00000000
+#  -   0x00000007 0x00: eax=0x00000000 ebx=0x029c6fbf ecx=0x40000000 edx=0xbc002400
+#  +   0x00000007 0x00: eax=0x00000000 ebx=0x029c6fbf ecx=0x40000000 edx=0xbc002e00
   									     ^^^
 
 and which proves for a gazillionth time that late loading is a bad bad
diff --git a/queue-5.15/x86-microcode-check-cpu-capabilities-after-late-micr.patch b/queue-5.15/x86-microcode-check-cpu-capabilities-after-late-micr.patch
index 8bc70e732ab..2ff411b5131 100644
--- a/queue-5.15/x86-microcode-check-cpu-capabilities-after-late-micr.patch
+++ b/queue-5.15/x86-microcode-check-cpu-capabilities-after-late-micr.patch
@@ -17,14 +17,14 @@ comparing the values before and after the microcode update.
 Another example is X86_FEATURE_SRBDS_CTRL which gets added only after
 microcode update:
 
-  --- cpuid.before	2023-01-21 14:54:15.652000747 +0100
-  +++ cpuid.after	2023-01-21 14:54:26.632001024 +0100
-  @@ -10,7 +10,7 @@ CPU:
-      0x00000004 0x04: eax=0x00000000 ebx=0x00000000 ecx=0x00000000 edx=0x00000000
-      0x00000005 0x00: eax=0x00000040 ebx=0x00000040 ecx=0x00000003 edx=0x11142120
-      0x00000006 0x00: eax=0x000027f7 ebx=0x00000002 ecx=0x00000001 edx=0x00000000
-  -   0x00000007 0x00: eax=0x00000000 ebx=0x029c6fbf ecx=0x40000000 edx=0xbc002400
-  +   0x00000007 0x00: eax=0x00000000 ebx=0x029c6fbf ecx=0x40000000 edx=0xbc002e00
+#  --- cpuid.before	2023-01-21 14:54:15.652000747 +0100
+#  +++ cpuid.after	2023-01-21 14:54:26.632001024 +0100
+#  @@ -10,7 +10,7 @@ CPU:
+#      0x00000004 0x04: eax=0x00000000 ebx=0x00000000 ecx=0x00000000 edx=0x00000000
+#      0x00000005 0x00: eax=0x00000040 ebx=0x00000040 ecx=0x00000003 edx=0x11142120
+#      0x00000006 0x00: eax=0x000027f7 ebx=0x00000002 ecx=0x00000001 edx=0x00000000
+#  -   0x00000007 0x00: eax=0x00000000 ebx=0x029c6fbf ecx=0x40000000 edx=0xbc002400
+#  +   0x00000007 0x00: eax=0x00000000 ebx=0x029c6fbf ecx=0x40000000 edx=0xbc002e00
   									     ^^^
 
 and which proves for a gazillionth time that late loading is a bad bad
diff --git a/queue-6.1/x86-microcode-check-cpu-capabilities-after-late-micr.patch b/queue-6.1/x86-microcode-check-cpu-capabilities-after-late-micr.patch
index c49f4fecaa8..5b81a27262d 100644
--- a/queue-6.1/x86-microcode-check-cpu-capabilities-after-late-micr.patch
+++ b/queue-6.1/x86-microcode-check-cpu-capabilities-after-late-micr.patch
@@ -17,14 +17,14 @@ comparing the values before and after the microcode update.
 Another example is X86_FEATURE_SRBDS_CTRL which gets added only after
 microcode update:
 
-  --- cpuid.before	2023-01-21 14:54:15.652000747 +0100
-  +++ cpuid.after	2023-01-21 14:54:26.632001024 +0100
-  @@ -10,7 +10,7 @@ CPU:
-      0x00000004 0x04: eax=0x00000000 ebx=0x00000000 ecx=0x00000000 edx=0x00000000
-      0x00000005 0x00: eax=0x00000040 ebx=0x00000040 ecx=0x00000003 edx=0x11142120
-      0x00000006 0x00: eax=0x000027f7 ebx=0x00000002 ecx=0x00000001 edx=0x00000000
-  -   0x00000007 0x00: eax=0x00000000 ebx=0x029c6fbf ecx=0x40000000 edx=0xbc002400
-  +   0x00000007 0x00: eax=0x00000000 ebx=0x029c6fbf ecx=0x40000000 edx=0xbc002e00
+#  --- cpuid.before	2023-01-21 14:54:15.652000747 +0100
+#  +++ cpuid.after	2023-01-21 14:54:26.632001024 +0100
+#  @@ -10,7 +10,7 @@ CPU:
+#      0x00000004 0x04: eax=0x00000000 ebx=0x00000000 ecx=0x00000000 edx=0x00000000
+#      0x00000005 0x00: eax=0x00000040 ebx=0x00000040 ecx=0x00000003 edx=0x11142120
+#      0x00000006 0x00: eax=0x000027f7 ebx=0x00000002 ecx=0x00000001 edx=0x00000000
+#  -   0x00000007 0x00: eax=0x00000000 ebx=0x029c6fbf ecx=0x40000000 edx=0xbc002400
+#  +   0x00000007 0x00: eax=0x00000000 ebx=0x029c6fbf ecx=0x40000000 edx=0xbc002e00
   									     ^^^
 
 and which proves for a gazillionth time that late loading is a bad bad