From: Pierre-Yves MORDRET <pierre-yves.mordret@st.com>
Date: Thu, 5 Oct 2017 09:51:21 +0000 (+0200)
Subject: ARM: dts: stm32: Add I2C1 support for STM32F746 SoC
X-Git-Tag: v4.15-rc1~75^2~36^2~14
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=0e813df73f0add8ded45116d67b8372add923cb9;p=thirdparty%2Fkernel%2Flinux.git

ARM: dts: stm32: Add I2C1 support for STM32F746 SoC

This patch adds I2C1 support for STM32F746 SoC.

Signed-off-by: M'boumba Cedric Madianga <cedric.madianga@gmail.com>
Signed-off-by: Pierre-Yves MORDRET <pierre-yves.mordret@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
---

diff --git a/arch/arm/boot/dts/stm32f746.dtsi b/arch/arm/boot/dts/stm32f746.dtsi
index 5633860037d23..30eca7fc32069 100644
--- a/arch/arm/boot/dts/stm32f746.dtsi
+++ b/arch/arm/boot/dts/stm32f746.dtsi
@@ -167,6 +167,18 @@
 			status = "disabled";
 		};
 
+		i2c1: i2c@40005400 {
+			compatible = "st,stm32f7-i2c";
+			reg = <0x40005400 0x400>;
+			interrupts = <31>,
+				     <32>;
+			resets = <&rcc STM32F7_APB1_RESET(I2C1)>;
+			clocks = <&rcc 1 CLK_I2C1>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
 		cec: cec@40006c00 {
 			compatible = "st,stm32-cec";
 			reg = <0x40006C00 0x400>;
@@ -379,6 +391,16 @@
 					bias-disable;
 				};
 			};
+
+			i2c1_pins_b: i2c1@0 {
+				pins {
+					pinmux = <STM32F746_PB9_FUNC_I2C1_SDA>,
+						 <STM32F746_PB8_FUNC_I2C1_SCL>;
+					bias-disable;
+					drive-open-drain;
+					slew-rate = <0>;
+				};
+			};
 		};
 
 		crc: crc@40023000 {