From: Aaron Larson <alarson@ddci.com>
Date: Thu, 22 Jun 2017 00:03:08 +0000 (-0700)
Subject: target-ppc: SPR_BOOKE_ESR not set on FP exceptions
X-Git-Tag: v2.10.0-rc0~84^2~12
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=0ee604abce61ab091b00ced40610866e02f55790;p=thirdparty%2Fqemu.git

target-ppc: SPR_BOOKE_ESR not set on FP exceptions

Properly set the book E exception syndrome register when a floating
point exception occurs.

Currently on a book E processor, the POWERPC_EXCP_FP exception handler
fails to set "env->spr[SPR_BOOKE_ESR] = ESR_FP;" as required by the
book E specification.

Signed-off-by: Aaron Larson <alarson@ddci.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---

diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index 3a9f0861e77..e6009e70e58 100644
--- a/target/ppc/excp_helper.c
+++ b/target/ppc/excp_helper.c
@@ -283,6 +283,7 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int excp_model, int excp)
              * precise in the MSR.
              */
             msr |= 0x00100000;
+            env->spr[SPR_BOOKE_ESR] = ESR_FP;
             break;
         case POWERPC_EXCP_INVAL:
             LOG_EXCP("Invalid instruction at " TARGET_FMT_lx "\n", env->nip);