From: Palmer Dabbelt Date: Tue, 12 Mar 2024 14:13:21 +0000 (-0700) Subject: Merge patch series "Support Andes PMU extension" X-Git-Tag: v6.9-rc1~18^2~1^2~11 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=0fd283cb64c0ac526a71fe10bf6e164f4f472ff2;p=thirdparty%2Fkernel%2Flinux.git Merge patch series "Support Andes PMU extension" Yu Chien Peter Lin says: This patch series introduces the Andes PMU extension, which serves the same purpose as Sscofpmf and Smcntrpmf. Its non-standard local interrupt is assigned to bit 18 in the custom S-mode local interrupt enable and pending registers (slie/slip), while the interrupt cause is (256 + 18). * b4-shazam-merge: riscv: andes: Support specifying symbolic firmware and hardware raw events riscv: dts: renesas: Add Andes PMU extension for r9a07g043f dt-bindings: riscv: Add Andes PMU extension description perf: RISC-V: Introduce Andes PMU to support perf event sampling perf: RISC-V: Eliminate redundant interrupt enable/disable operations riscv: dts: renesas: r9a07g043f: Update compatible string to use Andes INTC dt-bindings: riscv: Add Andes interrupt controller compatible string riscv: errata: Rename defines for Andes Link: https://lore.kernel.org/r/20240222083946.3977135-1-peterlin@andestech.com Signed-off-by: Palmer Dabbelt --- 0fd283cb64c0ac526a71fe10bf6e164f4f472ff2