From: Jack Xiao Date: Fri, 20 Mar 2020 04:03:08 +0000 (+0800) Subject: drm/amdgpu/gfx10: associate mes queue id with fence v2 X-Git-Tag: v5.19-rc1~153^2~3^2~314 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=11f39576ac807d39b1e7e7a3842eb55c387607bb;p=thirdparty%2Fkernel%2Flinux.git drm/amdgpu/gfx10: associate mes queue id with fence v2 Associate mes queue id with fence, so that EOP trap handler can look up which queue has issued the fence. v2: move mes queue flag to amdgpu_mes_ctx.h Signed-off-by: Jack Xiao Acked-by: Christian König Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes_ctx.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes_ctx.h index f3e1ba1a889f1..544f1aa86edf9 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes_ctx.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes_ctx.h @@ -115,4 +115,6 @@ struct amdgpu_mes_ctx_data { #define AMDGPU_FENCE_MES_QUEUE_FLAG 0x1000000u #define AMDGPU_FENCE_MES_QUEUE_ID_MASK (AMDGPU_FENCE_MES_QUEUE_FLAG - 1) +#define AMDGPU_FENCE_MES_QUEUE_FLAG 0x1000000u + #endif diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c index d06807355f5f9..e6e6012960972 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c @@ -8678,7 +8678,8 @@ static void gfx_v10_0_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, amdgpu_ring_write(ring, upper_32_bits(addr)); amdgpu_ring_write(ring, lower_32_bits(seq)); amdgpu_ring_write(ring, upper_32_bits(seq)); - amdgpu_ring_write(ring, 0); + amdgpu_ring_write(ring, ring->is_mes_queue ? + (ring->hw_queue_id | AMDGPU_FENCE_MES_QUEUE_FLAG) : 0); } static void gfx_v10_0_ring_emit_pipeline_sync(struct amdgpu_ring *ring)