From: Longbin Li Date: Sat, 1 Nov 2025 01:43:22 +0000 (+0800) Subject: riscv: dts: sophgo: Add syscon node for cv18xx X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=126a1b3c61cbec15ffaadf141adb9c4163da1757;p=thirdparty%2Fkernel%2Fstable.git riscv: dts: sophgo: Add syscon node for cv18xx Add top syscon node and all subdevice nodes for cv18xx series SoC. Co-developed-by: Inochi Amaoto Signed-off-by: Longbin Li Tested-by: Alexander Sverdlin Link: https://lore.kernel.org/r/20251101014329.18439-3-looong.bin@gmail.com Signed-off-by: Inochi Amaoto Signed-off-by: Chen Wang Signed-off-by: Chen Wang --- diff --git a/arch/riscv/boot/dts/sophgo/cv180x.dtsi b/arch/riscv/boot/dts/sophgo/cv180x.dtsi index ccdb45498653..42303acb2b39 100644 --- a/arch/riscv/boot/dts/sophgo/cv180x.dtsi +++ b/arch/riscv/boot/dts/sophgo/cv180x.dtsi @@ -25,6 +25,32 @@ #size-cells = <1>; ranges; + syscon: syscon@3000000 { + compatible = "sophgo,cv1800b-top-syscon", + "syscon", "simple-mfd"; + reg = <0x03000000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + + usbphy: phy@48 { + compatible = "sophgo,cv1800b-usb2-phy"; + reg = <0x48 0x4>; + #phy-cells = <0>; + clocks = <&clk CLK_USB_125M>, + <&clk CLK_USB_33K>, + <&clk CLK_USB_12M>; + clock-names = "app", "stb", "lpm"; + resets = <&rst RST_COMBO_PHY0>; + }; + + dmamux: dma-router@154 { + compatible = "sophgo,cv1800b-dmamux"; + reg = <0x154 0x8>, <0x298 0x4>; + #dma-cells = <2>; + dma-masters = <&dmac>; + }; + }; + rst: reset-controller@3003000 { compatible = "sophgo,cv1800b-reset"; reg = <0x3003000 0x1000>;