From: Jouni Högander Date: Wed, 29 May 2024 09:38:47 +0000 (+0300) Subject: drm/i915/display: Selective fetch Y position on Region Early Transport X-Git-Tag: v6.11-rc1~141^2~20^2~167 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=16b65af8b746ca6af74fd45156e755f2c8fa2379;p=thirdparty%2Fkernel%2Flinux.git drm/i915/display: Selective fetch Y position on Region Early Transport Selective fetch Y position differs when Region Early Transport is used. Use formula from Bspec for this. Bspec: 68927 Reviewed-by: Animesh Manna Signed-off-by: Jouni Högander Link: https://patchwork.freedesktop.org/patch/msgid/20240529093849.1016172-5-jouni.hogander@intel.com --- diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c index b7678b8a7f3d1..1aa70fc35b9dd 100644 --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c @@ -1302,7 +1302,11 @@ static void icl_plane_update_sel_fetch_noarm(struct intel_plane *plane, clip = &plane_state->psr2_sel_fetch_area; - val = (clip->y1 + plane_state->uapi.dst.y1) << 16; + if (crtc_state->enable_psr2_su_region_et) + y = max(0, plane_state->uapi.dst.y1 - crtc_state->psr2_su_area.y1); + else + y = (clip->y1 + plane_state->uapi.dst.y1); + val = y << 16; val |= plane_state->uapi.dst.x1; intel_de_write_fw(i915, SEL_FETCH_PLANE_POS(pipe, plane->id), val);