From: Yangyu Chen <cyy@cyyself.name>
Date: Tue, 30 Jul 2024 00:28:05 +0000 (+0000)
Subject: dt-bindings: riscv: Add SpacemiT X60 compatibles
X-Git-Tag: v6.14-rc1~104^2^2~10
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=16c9147e6a6c6342f4b1f9909b8f914f6e4adcab;p=thirdparty%2Flinux.git

dt-bindings: riscv: Add SpacemiT X60 compatibles

The X60 is RISC-V CPU cores from SpacemiT and currently used in their K1
SoC.

Link: https://www.spacemit.com/en/spacemit-x60-core/
Signed-off-by: Yangyu Chen <cyy@cyyself.name>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Signed-off-by: Yixun Lan <dlan@gentoo.org>
---

diff --git a/Documentation/devicetree/bindings/riscv/cpus.yaml b/Documentation/devicetree/bindings/riscv/cpus.yaml
index 8edc8261241ad..acb5b9ba6f049 100644
--- a/Documentation/devicetree/bindings/riscv/cpus.yaml
+++ b/Documentation/devicetree/bindings/riscv/cpus.yaml
@@ -46,6 +46,7 @@ properties:
               - sifive,u7
               - sifive,u74
               - sifive,u74-mc
+              - spacemit,x60
               - thead,c906
               - thead,c908
               - thead,c910