From: Hector Martin Date: Wed, 6 Nov 2024 07:54:00 +0000 (+0100) Subject: spi: dt-bindings: apple,spi: Add binding for Apple SPI controllers X-Git-Tag: v6.13-rc1~158^2~6 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=18096d339206de6cdb48500b2c3ad5ad0b48aad7;p=thirdparty%2Fkernel%2Flinux.git spi: dt-bindings: apple,spi: Add binding for Apple SPI controllers The Apple SPI controller is present in SoCs such as the M1 (t8103) and M1 Pro/Max (t600x). This controller uses one IRQ and one clock, and doesn't need any special properties, so the binding is trivial. Signed-off-by: Hector Martin Reviewed-by: Rob Herring Acked-by: Nick Chan Reviewed-by: Conor Dooley Signed-off-by: Janne Grunau Reviewed-by: Mark Kettenis Link: https://patch.msgid.link/20241106-asahi-spi-v5-1-e81a4f3a8e19@jannau.net Signed-off-by: Mark Brown --- diff --git a/Documentation/devicetree/bindings/spi/apple,spi.yaml b/Documentation/devicetree/bindings/spi/apple,spi.yaml new file mode 100644 index 0000000000000..7bef605a29635 --- /dev/null +++ b/Documentation/devicetree/bindings/spi/apple,spi.yaml @@ -0,0 +1,62 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/spi/apple,spi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Apple ARM SoC SPI controller + +allOf: + - $ref: spi-controller.yaml# + +maintainers: + - Hector Martin + +properties: + compatible: + items: + - enum: + - apple,t8103-spi + - apple,t8112-spi + - apple,t6000-spi + - const: apple,spi + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + interrupts: + maxItems: 1 + + power-domains: + maxItems: 1 + +required: + - compatible + - reg + - clocks + - interrupts + +unevaluatedProperties: false + +examples: + - | + #include + #include + + soc { + #address-cells = <2>; + #size-cells = <2>; + + spi@39b104000 { + compatible = "apple,t6000-spi", "apple,spi"; + reg = <0x3 0x9b104000 0x0 0x4000>; + interrupt-parent = <&aic>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk>; + }; + };