From: Lad Prabhakar Date: Sun, 9 Mar 2025 21:13:59 +0000 (+0000) Subject: clk: renesas: rzv2h: Remove unused `type` field from `struct pll_clk` X-Git-Tag: v6.16-rc1~114^2~2^2~1^2~17 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=18510fd7bfe66218a07024fb9f2a204e0f623794;p=thirdparty%2Flinux.git clk: renesas: rzv2h: Remove unused `type` field from `struct pll_clk` Remove the redundant `type` field from `struct pll_clk`, as it is not used in the PLL clock handling logic. Signed-off-by: Lad Prabhakar Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/20250309211402.80886-3-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven --- diff --git a/drivers/clk/renesas/rzv2h-cpg.c b/drivers/clk/renesas/rzv2h-cpg.c index 227a30d592fdd..5713805cac13e 100644 --- a/drivers/clk/renesas/rzv2h-cpg.c +++ b/drivers/clk/renesas/rzv2h-cpg.c @@ -97,7 +97,6 @@ struct pll_clk { void __iomem *base; struct clk_hw hw; struct pll pll; - unsigned int type; }; #define to_pll(_hw) container_of(_hw, struct pll_clk, hw) @@ -199,7 +198,6 @@ rzv2h_cpg_pll_clk_register(const struct cpg_core_clk *core, pll_clk->pll = core->cfg.pll; pll_clk->base = base; pll_clk->priv = priv; - pll_clk->type = core->type; ret = devm_clk_hw_register(dev, &pll_clk->hw); if (ret)