From: Haochen Jiang Date: Tue, 14 Jan 2025 08:18:50 +0000 (+0800) Subject: x86: Ignore rounding for vcvt[,u]si2sd under r32 and vcvt[,u]dq2pd instead of reporti... X-Git-Tag: binutils-2_44~77 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=18575d2ca8b836156a437908155ea4bf7da3ff10;p=thirdparty%2Fbinutils-gdb.git x86: Ignore rounding for vcvt[,u]si2sd under r32 and vcvt[,u]dq2pd instead of reporting bad for disassembler According to SDM, vcvt[,u]si2sd under r32 and vcvt[,u]dq2pd treat Rounding as Ignored when trying to using them. Thus, disassembler should accept bytecode with rounding instead of reporting bad. For assembler, it needs some more time to decide how to deal with that. gas/ChangeLog: * testsuite/gas/i386/evex.d: Add new testcase for vcvt[,u]dq2pd. Change the output for vcvt[,u]si2sd. * testsuite/gas/i386/evex.s: Ditto. * testsuite/gas/i386/x86-64-evex.d: Ditto. opcodes/ChangeLog: * i386-dis-evex-w.h: Add EXxEVexR64 for vcvt[,u]dq2pd. * i386-dis.c (OP_Rounding): Mark EVEX_b as used to change the handle for ignored rounding. --- diff --git a/gas/testsuite/gas/i386/evex.d b/gas/testsuite/gas/i386/evex.d index 52670f82736..a352340cae6 100644 --- a/gas/testsuite/gas/i386/evex.d +++ b/gas/testsuite/gas/i386/evex.d @@ -8,14 +8,18 @@ Disassembly of section .text: 0+ <_start>: +[a-f0-9]+: 62 f1 d6 38 2a f0 vcvtsi2ssl %eax,\{rd-sae\},%xmm5,%xmm6 - +[a-f0-9]+: 62 f1 57 38 2a f0 vcvtsi2sdl %eax,\{rd-bad\},%xmm5,%xmm6 - +[a-f0-9]+: 62 f1 d7 38 2a f0 vcvtsi2sdl %eax,\{rd-bad\},%xmm5,%xmm6 + +[a-f0-9]+: 62 f1 57 38 2a f0 vcvtsi2sdl %eax,%xmm5,%xmm6 + +[a-f0-9]+: 62 f1 d7 38 2a f0 vcvtsi2sdl %eax,%xmm5,%xmm6 +[a-f0-9]+: 62 f1 d6 08 7b f0 vcvtusi2ssl %eax,%xmm5,%xmm6 +[a-f0-9]+: 62 f1 57 08 7b f0 vcvtusi2sdl %eax,%xmm5,%xmm6 +[a-f0-9]+: 62 f1 d7 08 7b f0 vcvtusi2sdl %eax,%xmm5,%xmm6 +[a-f0-9]+: 62 f1 d6 38 7b f0 vcvtusi2ssl %eax,\{rd-sae\},%xmm5,%xmm6 - +[a-f0-9]+: 62 f1 57 38 7b f0 vcvtusi2sdl %eax,\{rd-bad\},%xmm5,%xmm6 - +[a-f0-9]+: 62 f1 d7 38 7b f0 vcvtusi2sdl %eax,\{rd-bad\},%xmm5,%xmm6 + +[a-f0-9]+: 62 f1 57 38 7b f0 vcvtusi2sdl %eax,%xmm5,%xmm6 + +[a-f0-9]+: 62 f1 d7 38 7b f0 vcvtusi2sdl %eax,%xmm5,%xmm6 +[a-f0-9]+: 62 e1 7e 08 2d c0 \{evex\} vcvtss2si %xmm0,%eax +[a-f0-9]+: 62 e1 7c 08 c2 c0 00 vcmpeqps %xmm0,%xmm0,%k0 + +[a-f0-9]+: 62 f1 7e 38 e6 f5 vcvtdq2pd %ymm5,%zmm6 + +[a-f0-9]+: 62 f1 7a 38 e6 f5 vcvtdq2pd %xmm5,%ymm6 + +[a-f0-9]+: 62 f1 7e 38 7a f5 vcvtudq2pd %ymm5,%zmm6 + +[a-f0-9]+: 62 f1 7a 38 7a f5 vcvtudq2pd %xmm5,%ymm6 #pass diff --git a/gas/testsuite/gas/i386/evex.s b/gas/testsuite/gas/i386/evex.s index b72e1cd1e4f..473ea8a2418 100644 --- a/gas/testsuite/gas/i386/evex.s +++ b/gas/testsuite/gas/i386/evex.s @@ -13,3 +13,7 @@ _start: .insn EVEX.LIG.F2.0F.W1 0x7b, %eax,{rd-sae},%xmm5,%xmm6 .byte 0x62, 0xe1, 0x7e, 0x08, 0x2d, 0xc0 .byte 0x62, 0xe1, 0x7c, 0x08, 0xc2, 0xc0, 0x00 + .insn EVEX.512.F3.0F.W0 0xe6, {rd-sae},%zmm5,%ymm6 + .insn EVEX.256.F3.0F.W0 0xe6, {rd-sae},%ymm5,%xmm6 + .insn EVEX.512.F3.0F.W0 0x7a, {rd-sae},%zmm5,%ymm6 + .insn EVEX.256.F3.0F.W0 0x7a, {rd-sae},%ymm5,%xmm6 diff --git a/gas/testsuite/gas/i386/x86-64-evex.d b/gas/testsuite/gas/i386/x86-64-evex.d index 5d974c312da..6fb4bf87863 100644 --- a/gas/testsuite/gas/i386/x86-64-evex.d +++ b/gas/testsuite/gas/i386/x86-64-evex.d @@ -9,14 +9,18 @@ Disassembly of section .text: 0+ <_start>: +[a-f0-9]+: 62 f1 d6 38 2a f0 vcvtsi2ss %rax,\{rd-sae\},%xmm5,%xmm6 - +[a-f0-9]+: 62 f1 57 38 2a f0 vcvtsi2sd %eax,\{rd-bad\},%xmm5,%xmm6 + +[a-f0-9]+: 62 f1 57 38 2a f0 vcvtsi2sd %eax,%xmm5,%xmm6 +[a-f0-9]+: 62 f1 d7 38 2a f0 vcvtsi2sd %rax,\{rd-sae\},%xmm5,%xmm6 +[a-f0-9]+: 62 f1 d6 08 7b f0 vcvtusi2ss %rax,%xmm5,%xmm6 +[a-f0-9]+: 62 f1 57 08 7b f0 vcvtusi2sd %eax,%xmm5,%xmm6 +[a-f0-9]+: 62 f1 d7 08 7b f0 vcvtusi2sd %rax,%xmm5,%xmm6 +[a-f0-9]+: 62 f1 d6 38 7b f0 vcvtusi2ss %rax,\{rd-sae\},%xmm5,%xmm6 - +[a-f0-9]+: 62 f1 57 38 7b f0 vcvtusi2sd %eax,\{rd-bad\},%xmm5,%xmm6 + +[a-f0-9]+: 62 f1 57 38 7b f0 vcvtusi2sd %eax,%xmm5,%xmm6 +[a-f0-9]+: 62 f1 d7 38 7b f0 vcvtusi2sd %rax,\{rd-sae\},%xmm5,%xmm6 +[a-f0-9]+: 62 e1 7e 08 2d c0 vcvtss2si %xmm0,%r16d +[a-f0-9]+: 62 e1 7c 08 c2 c0 00 vcmpeqps %xmm0,%xmm0,\(bad\) + +[a-f0-9]+: 62 f1 7e 38 e6 f5 vcvtdq2pd %ymm5,%zmm6 + +[a-f0-9]+: 62 f1 7a 38 e6 f5 vcvtdq2pd %xmm5,%ymm6 + +[a-f0-9]+: 62 f1 7e 38 7a f5 vcvtudq2pd %ymm5,%zmm6 + +[a-f0-9]+: 62 f1 7a 38 7a f5 vcvtudq2pd %xmm5,%ymm6 #pass diff --git a/opcodes/i386-dis-evex-w.h b/opcodes/i386-dis-evex-w.h index c15469210a5..bfdcfb29fdd 100644 --- a/opcodes/i386-dis-evex-w.h +++ b/opcodes/i386-dis-evex-w.h @@ -97,7 +97,7 @@ }, /* EVEX_W_0F7A_P_1 */ { - { "vcvtudq2pd", { XM, EXEvexHalfBcstXmmq }, 0 }, + { "vcvtudq2pd", { XM, EXEvexHalfBcstXmmq, EXxEVexR64 }, 0 }, { "vcvtuqq2pd", { XM, EXx, EXxEVexR }, 0 }, }, /* EVEX_W_0F7A_P_2 */ @@ -161,7 +161,7 @@ }, /* EVEX_W_0FE6_P_1 */ { - { "%XEvcvtdq2pd", { XM, EXEvexHalfBcstXmmq }, 0 }, + { "%XEvcvtdq2pd", { XM, EXEvexHalfBcstXmmq, EXxEVexR64 }, 0 }, { "vcvtqq2pd", { XM, EXx, EXxEVexR }, 0 }, }, /* EVEX_W_0FE7 */ diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c index 06bd1e0f712..2eb2c42629d 100644 --- a/opcodes/i386-dis.c +++ b/opcodes/i386-dis.c @@ -14412,6 +14412,7 @@ OP_Rounding (instr_info *ins, int bytemode, int sizeflag ATTRIBUTE_UNUSED) if (ins->modrm.mod != 3 || !ins->vex.b) return true; + ins->evex_used |= EVEX_b_used; switch (bytemode) { case evex_rounding_64_mode: @@ -14419,11 +14420,9 @@ OP_Rounding (instr_info *ins, int bytemode, int sizeflag ATTRIBUTE_UNUSED) return true; /* Fall through. */ case evex_rounding_mode: - ins->evex_used |= EVEX_b_used; oappend (ins, names_rounding[ins->vex.ll]); break; case evex_sae_mode: - ins->evex_used |= EVEX_b_used; oappend (ins, "{"); break; default: