From: Jakob Unterwurzacher Date: Thu, 26 Sep 2024 13:20:30 +0000 (+0200) Subject: arm64: dts: rockchip: add attiny_rst_gate to Ringneck X-Git-Tag: v6.13-rc1~140^2~32^2~59 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=1871e6f7c5e606b97708af50a7fec83a904a761b;p=thirdparty%2Fkernel%2Flinux.git arm64: dts: rockchip: add attiny_rst_gate to Ringneck Ringneck v1.4 can contain (placement option) an on-board ATtiny microcontroller instead of an STM32. In normal operation, this is transparent to the software, as both microcontrollers emulate the same ICs (amc6821 and isl1208). For flashing the ATtiny, the SWITCH_REG1 regulator of the board's PMIC is used to enable the ATtiny UPDI debug interface. If the STM32 is placed, or if we are running on an older Ringneck revision, SWITCH_REG1 is not connected and has no effect. Add attiny-updi-gate-regulator so userspace can control it via sysfs (needs CONFIG_REGULATOR_USERSPACE_CONSUMER): echo enabled > /sys/devices/platform/attiny-updi-gate-regulator/state Signed-off-by: Jakob Unterwurzacher Tested-by: Quentin Schulz Reviewed-by: Quentin Schulz Link: https://lore.kernel.org/r/20240926132028.21910-1-jakob.unterwurzacher@cherry.de Signed-off-by: Heiko Stuebner --- diff --git a/arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi b/arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi index a683ed3e2fce6..06ef40d292bf2 100644 --- a/arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi +++ b/arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi @@ -16,6 +16,12 @@ rtc1 = &rk809; }; + /* allows userspace to control the gate of the ATtiny UPDI pass FET via sysfs */ + attiny-updi-gate-regulator { + compatible = "regulator-output"; + vout-supply = <&vg_attiny_updi>; + }; + emmc_pwrseq: emmc-pwrseq { compatible = "mmc-pwrseq-emmc"; pinctrl-0 = <&emmc_reset>; @@ -282,6 +288,11 @@ regulator-suspend-microvolt = <1800000>; }; }; + + /* supplies the gate of the ATtiny UPDI pass FET */ + vg_attiny_updi: SWITCH_REG1 { + regulator-name = "vg_attiny_updi"; + }; }; }; };