From: Greg Kroah-Hartman Date: Thu, 16 Oct 2025 09:34:13 +0000 (+0200) Subject: 6.12-stable patches X-Git-Tag: v5.15.195~88 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=1a6721fca1872a135d73b6e73a27e7cba1a50acd;p=thirdparty%2Fkernel%2Fstable-queue.git 6.12-stable patches added patches: drm-amd-display-enable-dynamic-dtbclk-switch.patch drm-nouveau-fix-bad-ret-code-in-nouveau_bo_move_prep.patch drm-panthor-fix-memory-leak-in-panthor_ioctl_group_create.patch drm-rcar-du-dsi-fix-1-2-3-lane-support.patch drm-xe-uapi-loosen-used-tracking-restriction.patch --- diff --git a/queue-6.12/drm-amd-display-enable-dynamic-dtbclk-switch.patch b/queue-6.12/drm-amd-display-enable-dynamic-dtbclk-switch.patch new file mode 100644 index 0000000000..34d1c04ad7 --- /dev/null +++ b/queue-6.12/drm-amd-display-enable-dynamic-dtbclk-switch.patch @@ -0,0 +1,38 @@ +From 5949e7c4890c3cf65e783c83c355b95e21f10dba Mon Sep 17 00:00:00 2001 +From: Fangzhi Zuo +Date: Wed, 24 Sep 2025 14:37:01 -0400 +Subject: drm/amd/display: Enable Dynamic DTBCLK Switch + +From: Fangzhi Zuo + +commit 5949e7c4890c3cf65e783c83c355b95e21f10dba upstream. + +[WHAT] +Since dcn35, DTBCLK can be disabled when no DP2 sink connected for +power saving purpose. + +Cc: Mario Limonciello +Cc: Alex Deucher +Cc: stable@vger.kernel.org +Reviewed-by: Aurabindo Pillai +Signed-off-by: Fangzhi Zuo +Signed-off-by: Alex Hung +Signed-off-by: Alex Deucher +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 4 ++++ + 1 file changed, 4 insertions(+) + +--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c ++++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +@@ -2027,6 +2027,10 @@ static int amdgpu_dm_init(struct amdgpu_ + + init_data.flags.disable_ips_in_vpb = 0; + ++ /* DCN35 and above supports dynamic DTBCLK switch */ ++ if (amdgpu_ip_version(adev, DCE_HWIP, 0) >= IP_VERSION(3, 5, 0)) ++ init_data.flags.allow_0_dtb_clk = true; ++ + /* Enable DWB for tested platforms only */ + if (amdgpu_ip_version(adev, DCE_HWIP, 0) >= IP_VERSION(3, 0, 0)) + init_data.num_virtual_links = 1; diff --git a/queue-6.12/drm-nouveau-fix-bad-ret-code-in-nouveau_bo_move_prep.patch b/queue-6.12/drm-nouveau-fix-bad-ret-code-in-nouveau_bo_move_prep.patch new file mode 100644 index 0000000000..fae87580ce --- /dev/null +++ b/queue-6.12/drm-nouveau-fix-bad-ret-code-in-nouveau_bo_move_prep.patch @@ -0,0 +1,34 @@ +From e4bea919584ff292c9156cf7d641a2ab3cbe27b0 Mon Sep 17 00:00:00 2001 +From: Shuhao Fu +Date: Wed, 8 Oct 2025 00:17:09 +0800 +Subject: drm/nouveau: fix bad ret code in nouveau_bo_move_prep + +From: Shuhao Fu + +commit e4bea919584ff292c9156cf7d641a2ab3cbe27b0 upstream. + +In `nouveau_bo_move_prep`, if `nouveau_mem_map` fails, an error code +should be returned. Currently, it returns zero even if vmm addr is not +correctly mapped. + +Cc: stable@vger.kernel.org +Reviewed-by: Petr Vorel +Signed-off-by: Shuhao Fu +Fixes: 9ce523cc3bf2 ("drm/nouveau: separate buffer object backing memory from nvkm structures") +Signed-off-by: Danilo Krummrich +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/nouveau/nouveau_bo.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/gpu/drm/nouveau/nouveau_bo.c ++++ b/drivers/gpu/drm/nouveau/nouveau_bo.c +@@ -852,7 +852,7 @@ done: + nvif_vmm_put(vmm, &old_mem->vma[1]); + nvif_vmm_put(vmm, &old_mem->vma[0]); + } +- return 0; ++ return ret; + } + + static int diff --git a/queue-6.12/drm-panthor-fix-memory-leak-in-panthor_ioctl_group_create.patch b/queue-6.12/drm-panthor-fix-memory-leak-in-panthor_ioctl_group_create.patch new file mode 100644 index 0000000000..7297f29ba2 --- /dev/null +++ b/queue-6.12/drm-panthor-fix-memory-leak-in-panthor_ioctl_group_create.patch @@ -0,0 +1,50 @@ +From ca2a6abdaee43808034cdb218428d2ed85fd3db8 Mon Sep 17 00:00:00 2001 +From: Jann Horn +Date: Wed, 13 Nov 2024 22:03:39 +0100 +Subject: drm/panthor: Fix memory leak in panthor_ioctl_group_create() + +From: Jann Horn + +commit ca2a6abdaee43808034cdb218428d2ed85fd3db8 upstream. + +When bailing out due to group_priority_permit() failure, the queue_args +need to be freed. Fix it by rearranging the function to use the +goto-on-error pattern, such that the success case flows straight without +indentation while error cases jump forward to cleanup. + +Cc: stable@vger.kernel.org +Fixes: 5f7762042f8a ("drm/panthor: Restrict high priorities on group_create") +Signed-off-by: Jann Horn +Reviewed-by: Boris Brezillon +Reviewed-by: Liviu Dudau +Reviewed-by: Steven Price +Signed-off-by: Steven Price +Link: https://lore.kernel.org/r/20241113-panthor-fix-gcq-bailout-v1-1-654307254d68@google.com +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/panthor/panthor_drv.c | 11 ++++++----- + 1 file changed, 6 insertions(+), 5 deletions(-) + +--- a/drivers/gpu/drm/panthor/panthor_drv.c ++++ b/drivers/gpu/drm/panthor/panthor_drv.c +@@ -1032,14 +1032,15 @@ static int panthor_ioctl_group_create(st + + ret = group_priority_permit(file, args->priority); + if (ret) +- return ret; ++ goto out; + + ret = panthor_group_create(pfile, args, queue_args); +- if (ret >= 0) { +- args->group_handle = ret; +- ret = 0; +- } ++ if (ret < 0) ++ goto out; ++ args->group_handle = ret; ++ ret = 0; + ++out: + kvfree(queue_args); + return ret; + } diff --git a/queue-6.12/drm-rcar-du-dsi-fix-1-2-3-lane-support.patch b/queue-6.12/drm-rcar-du-dsi-fix-1-2-3-lane-support.patch new file mode 100644 index 0000000000..5bae245264 --- /dev/null +++ b/queue-6.12/drm-rcar-du-dsi-fix-1-2-3-lane-support.patch @@ -0,0 +1,73 @@ +From d83f1d19c898ac1b54ae64d1c950f5beff801982 Mon Sep 17 00:00:00 2001 +From: Marek Vasut +Date: Wed, 13 Aug 2025 23:08:13 +0200 +Subject: drm/rcar-du: dsi: Fix 1/2/3 lane support + +From: Marek Vasut + +commit d83f1d19c898ac1b54ae64d1c950f5beff801982 upstream. + +Remove fixed PPI lane count setup. The R-Car DSI host is capable +of operating in 1..4 DSI lane mode. Remove the hard-coded 4-lane +configuration from PPI register settings and instead configure +the PPI lane count according to lane count information already +obtained by this driver instance. + +Configure TXSETR register to match PPI lane count. The R-Car V4H +Reference Manual R19UH0186EJ0121 Rev.1.21 section 67.2.2.3 Tx Set +Register (TXSETR), field LANECNT description indicates that the +TXSETR register LANECNT bitfield lane count must be configured +such, that it matches lane count configuration in PPISETR register +DLEN bitfield. Make sure the LANECNT and DLEN bitfields are +configured to match. + +Fixes: 155358310f01 ("drm: rcar-du: Add R-Car DSI driver") +Cc: stable@vger.kernel.org +Signed-off-by: Marek Vasut +Reviewed-by: Tomi Valkeinen +Link: https://lore.kernel.org/r/20250813210840.97621-1-marek.vasut+renesas@mailbox.org +Signed-off-by: Tomi Valkeinen +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c | 5 ++++- + drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h | 8 ++++---- + 2 files changed, 8 insertions(+), 5 deletions(-) + +--- a/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c ++++ b/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c +@@ -576,7 +576,10 @@ static int rcar_mipi_dsi_startup(struct + udelay(10); + rcar_mipi_dsi_clr(dsi, CLOCKSET1, CLOCKSET1_UPDATEPLL); + +- ppisetr = PPISETR_DLEN_3 | PPISETR_CLEN; ++ rcar_mipi_dsi_clr(dsi, TXSETR, TXSETR_LANECNT_MASK); ++ rcar_mipi_dsi_set(dsi, TXSETR, dsi->lanes - 1); ++ ++ ppisetr = ((BIT(dsi->lanes) - 1) & PPISETR_DLEN_MASK) | PPISETR_CLEN; + rcar_mipi_dsi_write(dsi, PPISETR, ppisetr); + + rcar_mipi_dsi_set(dsi, PHYSETUP, PHYSETUP_SHUTDOWNZ); +--- a/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h ++++ b/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h +@@ -12,6 +12,9 @@ + #define LINKSR_LPBUSY (1 << 1) + #define LINKSR_HSBUSY (1 << 0) + ++#define TXSETR 0x100 ++#define TXSETR_LANECNT_MASK (0x3 << 0) ++ + /* + * Video Mode Register + */ +@@ -80,10 +83,7 @@ + * PHY-Protocol Interface (PPI) Registers + */ + #define PPISETR 0x700 +-#define PPISETR_DLEN_0 (0x1 << 0) +-#define PPISETR_DLEN_1 (0x3 << 0) +-#define PPISETR_DLEN_2 (0x7 << 0) +-#define PPISETR_DLEN_3 (0xf << 0) ++#define PPISETR_DLEN_MASK (0xf << 0) + #define PPISETR_CLEN (1 << 8) + + #define PPICLCR 0x710 diff --git a/queue-6.12/drm-xe-uapi-loosen-used-tracking-restriction.patch b/queue-6.12/drm-xe-uapi-loosen-used-tracking-restriction.patch new file mode 100644 index 0000000000..4d91b05cca --- /dev/null +++ b/queue-6.12/drm-xe-uapi-loosen-used-tracking-restriction.patch @@ -0,0 +1,74 @@ +From 2d1684a077d62fddfac074052c162ec6573a34e1 Mon Sep 17 00:00:00 2001 +From: Matthew Auld +Date: Fri, 19 Sep 2025 13:20:53 +0100 +Subject: drm/xe/uapi: loosen used tracking restriction +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Matthew Auld + +commit 2d1684a077d62fddfac074052c162ec6573a34e1 upstream. + +Currently this is hidden behind perfmon_capable() since this is +technically an info leak, given that this is a system wide metric. +However the granularity reported here is always PAGE_SIZE aligned, which +matches what the core kernel is already willing to expose to userspace +if querying how many free RAM pages there are on the system, and that +doesn't need any special privileges. In addition other drm drivers seem +happy to expose this. + +The motivation here if with oneAPI where they want to use the system +wide 'used' reporting here, so not the per-client fdinfo stats. This has +also come up with some perf overlay applications wanting this +information. + +Fixes: 1105ac15d2a1 ("drm/xe/uapi: restrict system wide accounting") +Signed-off-by: Matthew Auld +Cc: Thomas Hellström +Cc: Joshua Santosh +Cc: José Roberto de Souza +Cc: Matthew Brost +Cc: Rodrigo Vivi +Cc: # v6.8+ +Acked-by: Rodrigo Vivi +Reviewed-by: Lucas De Marchi +Link: https://lore.kernel.org/r/20250919122052.420979-2-matthew.auld@intel.com +(cherry picked from commit 4d0b035fd6dae8ee48e9c928b10f14877e595356) +Signed-off-by: Lucas De Marchi +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/xe/xe_query.c | 15 ++++++--------- + 1 file changed, 6 insertions(+), 9 deletions(-) + +--- a/drivers/gpu/drm/xe/xe_query.c ++++ b/drivers/gpu/drm/xe/xe_query.c +@@ -277,8 +277,7 @@ static int query_mem_regions(struct xe_d + mem_regions->mem_regions[0].instance = 0; + mem_regions->mem_regions[0].min_page_size = PAGE_SIZE; + mem_regions->mem_regions[0].total_size = man->size << PAGE_SHIFT; +- if (perfmon_capable()) +- mem_regions->mem_regions[0].used = ttm_resource_manager_usage(man); ++ mem_regions->mem_regions[0].used = ttm_resource_manager_usage(man); + mem_regions->num_mem_regions = 1; + + for (i = XE_PL_VRAM0; i <= XE_PL_VRAM1; ++i) { +@@ -294,13 +293,11 @@ static int query_mem_regions(struct xe_d + mem_regions->mem_regions[mem_regions->num_mem_regions].total_size = + man->size; + +- if (perfmon_capable()) { +- xe_ttm_vram_get_used(man, +- &mem_regions->mem_regions +- [mem_regions->num_mem_regions].used, +- &mem_regions->mem_regions +- [mem_regions->num_mem_regions].cpu_visible_used); +- } ++ xe_ttm_vram_get_used(man, ++ &mem_regions->mem_regions ++ [mem_regions->num_mem_regions].used, ++ &mem_regions->mem_regions ++ [mem_regions->num_mem_regions].cpu_visible_used); + + mem_regions->mem_regions[mem_regions->num_mem_regions].cpu_visible_size = + xe_ttm_vram_get_cpu_visible_size(man); diff --git a/queue-6.12/series b/queue-6.12/series index 7c7dbf64f8..ddd50b50bf 100644 --- a/queue-6.12/series +++ b/queue-6.12/series @@ -112,3 +112,8 @@ media-vivid-fix-disappearing-vendor-command-with-id-messages.patch media-ti-j721e-csi2rx-use-devm_of_platform_populate.patch media-ti-j721e-csi2rx-fix-source-subdev-link-creation.patch media-lirc-fix-error-handling-in-lirc_register.patch +drm-panthor-fix-memory-leak-in-panthor_ioctl_group_create.patch +drm-rcar-du-dsi-fix-1-2-3-lane-support.patch +drm-nouveau-fix-bad-ret-code-in-nouveau_bo_move_prep.patch +drm-xe-uapi-loosen-used-tracking-restriction.patch +drm-amd-display-enable-dynamic-dtbclk-switch.patch