From: Chris Wilson <chris@chris-wilson.co.uk>
Date: Wed, 8 Sep 2010 20:07:28 +0000 (+0100)
Subject: drm/i915/dp: Flush the PLL register write before sleeping
X-Git-Tag: v2.6.37-rc1~92^2~28^2~163
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=1af5fa1b7e5ff8332f8a2ee3c5fb44d93b34868d;p=thirdparty%2Fkernel%2Flinux.git

drm/i915/dp: Flush the PLL register write before sleeping

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 27805a9ca877f..c7aa29bfdea99 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -883,6 +883,7 @@ static void ironlake_edp_pll_off(struct drm_encoder *encoder)
 	dpa_ctl = I915_READ(DP_A);
 	dpa_ctl |= DP_PLL_ENABLE;
 	I915_WRITE(DP_A, dpa_ctl);
+	POSTING_READ(DP_A);
 	udelay(200);
 }