From: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Date: Mon, 21 Mar 2016 08:03:03 +0000 (+0100)
Subject: target-tricore: Fix psw_read() clearing too many bits
X-Git-Tag: v2.6.0-rc0~15^2~7
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=1bd3e2fc3de683941f18e346a1793b81b20cab2d;p=thirdparty%2Fqemu.git

target-tricore: Fix psw_read() clearing too many bits

psw_read() ought to sync the PSW value with the
cached status bits (C,V,SV,AV,SAV). For this the bits
are cleared in the PSW before they are written from the
cached bits. The clear mask is too big and clears two
additional bits.

Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Message-Id: <1458547383-23102-4-git-send-email-kbastian@mail.uni-paderborn.de>
---

diff --git a/target-tricore/helper.c b/target-tricore/helper.c
index 7d96daddb12..adbb6db10da 100644
--- a/target-tricore/helper.c
+++ b/target-tricore/helper.c
@@ -113,7 +113,7 @@ void tricore_cpu_list(FILE *f, fprintf_function cpu_fprintf)
 uint32_t psw_read(CPUTriCoreState *env)
 {
     /* clear all USB bits */
-    env->PSW &= 0xffffff;
+    env->PSW &= 0x6ffffff;
     /* now set them from the cache */
     env->PSW |= ((env->PSW_USB_C != 0) << 31);
     env->PSW |= ((env->PSW_USB_V   & (1 << 31))  >> 1);