From: Greg Kroah-Hartman Date: Thu, 15 Jan 2015 00:35:27 +0000 (-0800) Subject: remove queue-3.14/powerpc-powernv-switch-off-mmu-before-entering-nap-sleep-rvwinkle... X-Git-Tag: v3.10.65~2 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=1c3ac70f4cafaa7393311f12ae65b9a948a34772;p=thirdparty%2Fkernel%2Fstable-queue.git remove queue-3.14/powerpc-powernv-switch-off-mmu-before-entering-nap-sleep-rvwinkle-mode.patch --- diff --git a/queue-3.14/powerpc-powernv-switch-off-mmu-before-entering-nap-sleep-rvwinkle-mode.patch b/queue-3.14/powerpc-powernv-switch-off-mmu-before-entering-nap-sleep-rvwinkle-mode.patch deleted file mode 100644 index 261f9e722a2..00000000000 --- a/queue-3.14/powerpc-powernv-switch-off-mmu-before-entering-nap-sleep-rvwinkle-mode.patch +++ /dev/null @@ -1,76 +0,0 @@ -From 8117ac6a6c2fa0f847ff6a21a1f32c8d2c8501d0 Mon Sep 17 00:00:00 2001 -From: Paul Mackerras -Date: Wed, 10 Dec 2014 00:26:50 +0530 -Subject: powerpc/powernv: Switch off MMU before entering nap/sleep/rvwinkle mode - -From: Paul Mackerras - -commit 8117ac6a6c2fa0f847ff6a21a1f32c8d2c8501d0 upstream. - -Currently, when going idle, we set the flag indicating that we are in -nap mode (paca->kvm_hstate.hwthread_state) and then execute the nap -(or sleep or rvwinkle) instruction, all with the MMU on. This is bad -for two reasons: (a) the architecture specifies that those instructions -must be executed with the MMU off, and in fact with only the SF, HV, ME -and possibly RI bits set, and (b) this introduces a race, because as -soon as we set the flag, another thread can switch the MMU to a guest -context. If the race is lost, this thread will typically start looping -on relocation-on ISIs at 0xc...4400. - -This fixes it by setting the MSR as required by the architecture before -setting the flag or executing the nap/sleep/rvwinkle instruction. - -[ shreyas@linux.vnet.ibm.com: Edited to handle LE ] -Signed-off-by: Paul Mackerras -Signed-off-by: Shreyas B. Prabhu -Cc: Benjamin Herrenschmidt -Cc: Michael Ellerman -Cc: linuxppc-dev@lists.ozlabs.org -Signed-off-by: Michael Ellerman -Signed-off-by: Greg Kroah-Hartman - ---- - arch/powerpc/include/asm/reg.h | 2 ++ - arch/powerpc/kernel/idle_power7.S | 18 +++++++++++++++++- - 2 files changed, 19 insertions(+), 1 deletion(-) - ---- a/arch/powerpc/include/asm/reg.h -+++ b/arch/powerpc/include/asm/reg.h -@@ -118,8 +118,10 @@ - #define __MSR (MSR_ME | MSR_RI | MSR_IR | MSR_DR | MSR_ISF |MSR_HV) - #ifdef __BIG_ENDIAN__ - #define MSR_ __MSR -+#define MSR_IDLE (MSR_ME | MSR_SF | MSR_HV) - #else - #define MSR_ (__MSR | MSR_LE) -+#define MSR_IDLE (MSR_ME | MSR_SF | MSR_HV | MSR_LE) - #endif - #define MSR_KERNEL (MSR_ | MSR_64BIT) - #define MSR_USER32 (MSR_ | MSR_PR | MSR_EE) ---- a/arch/powerpc/kernel/idle_power7.S -+++ b/arch/powerpc/kernel/idle_power7.S -@@ -84,7 +84,23 @@ _GLOBAL(power7_nap) - std r9,_MSR(r1) - std r1,PACAR1(r13) - --_GLOBAL(power7_enter_nap_mode) -+ /* -+ * Go to real mode to do the nap, as required by the architecture. -+ * Also, we need to be in real mode before setting hwthread_state, -+ * because as soon as we do that, another thread can switch -+ * the MMU context to the guest. -+ */ -+ LOAD_REG_IMMEDIATE(r5, MSR_IDLE) -+ li r6, MSR_RI -+ andc r6, r9, r6 -+ LOAD_REG_ADDR(r7, power7_enter_nap_mode) -+ mtmsrd r6, 1 /* clear RI before setting SRR0/1 */ -+ mtspr SPRN_SRR0, r7 -+ mtspr SPRN_SRR1, r5 -+ rfid -+ -+ .globl power7_enter_nap_mode -+power7_enter_nap_mode: - #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE - /* Tell KVM we're napping */ - li r4,KVM_HWTHREAD_IN_NAP diff --git a/queue-3.14/series b/queue-3.14/series index 9ee43e912dc..358e0f632cd 100644 --- a/queue-3.14/series +++ b/queue-3.14/series @@ -17,7 +17,6 @@ asoc-max98090-fix-ill-defined-sidetone-route.patch asoc-dwc-ensure-fifos-are-flushed-to-prevent-channel-swap.patch powerpc-fix-bad-null-pointer-check-in-udbg_uart_getc_poll.patch powerpc-book3s-fix-partial-invalidation-of-tlbs-in-mce-code.patch -powerpc-powernv-switch-off-mmu-before-entering-nap-sleep-rvwinkle-mode.patch pci-restore-detection-of-read-only-bars.patch pstore-ram-fix-hangs-by-using-write-combine-mappings.patch pstore-ram-allow-optional-mapping-with-pgprot_noncached.patch