From: Sasha Levin Date: Sat, 25 Mar 2023 00:41:53 +0000 (-0400) Subject: Fixes for 6.2 X-Git-Tag: v5.15.105~81 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=1c8178e50a38c49905de55d04039f1af0be99209;p=thirdparty%2Fkernel%2Fstable-queue.git Fixes for 6.2 Signed-off-by: Sasha Levin --- diff --git a/queue-6.2/drm-amd-display-fix-dp-mst-sinks-removal-issue.patch b/queue-6.2/drm-amd-display-fix-dp-mst-sinks-removal-issue.patch new file mode 100644 index 00000000000..f3dcc3d67ef --- /dev/null +++ b/queue-6.2/drm-amd-display-fix-dp-mst-sinks-removal-issue.patch @@ -0,0 +1,79 @@ +From a77829221c26b60db4665f9d53458d4ec36b5124 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 22 Mar 2023 17:08:41 -0500 +Subject: drm/amd/display: Fix DP MST sinks removal issue + +From: Cruise Hung + +[ Upstream commit cbd6c1b17d3b42b7935526a86ad5f66838767d03 ] + +[Why] +In USB4 DP tunneling, it's possible to have this scenario that +the path becomes unavailable and CM tears down the path a little bit late. +So, in this case, the HPD is high but fails to read any DPCD register. +That causes the link connection type to be set to sst. +And not all sinks are removed behind the MST branch. + +[How] +Restore the link connection type if it fails to read DPCD register. + +Cc: stable@vger.kernel.org +Cc: Mario Limonciello +Reviewed-by: Wenjing Liu +Acked-by: Qingqing Zhuo +Signed-off-by: Cruise Hung +Tested-by: Daniel Wheeler +Signed-off-by: Alex Deucher +(cherry picked from commit cbd6c1b17d3b42b7935526a86ad5f66838767d03) +Modified for stable backport as a lot of the code in this file was moved +in 6.3 to drivers/gpu/drm/amd/display/dc/link/link_detection.c. +Signed-off-by: Mario Limonciello +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/amd/display/dc/core/dc_link.c | 9 +++++++++ + 1 file changed, 9 insertions(+) + +diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c b/drivers/gpu/drm/amd/display/dc/core/dc_link.c +index 754fc86341494..54656fcaa6464 100644 +--- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c ++++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c +@@ -1016,6 +1016,7 @@ static bool detect_link_and_local_sink(struct dc_link *link, + struct dc_sink *prev_sink = NULL; + struct dpcd_caps prev_dpcd_caps; + enum dc_connection_type new_connection_type = dc_connection_none; ++ enum dc_connection_type pre_connection_type = link->type; + const uint32_t post_oui_delay = 30; // 30ms + + DC_LOGGER_INIT(link->ctx->logger); +@@ -1118,6 +1119,8 @@ static bool detect_link_and_local_sink(struct dc_link *link, + } + + if (!detect_dp(link, &sink_caps, reason)) { ++ link->type = pre_connection_type; ++ + if (prev_sink) + dc_sink_release(prev_sink); + return false; +@@ -1349,6 +1352,8 @@ bool dc_link_detect(struct dc_link *link, enum dc_detect_reason reason) + bool is_delegated_to_mst_top_mgr = false; + enum dc_connection_type pre_link_type = link->type; + ++ DC_LOGGER_INIT(link->ctx->logger); ++ + is_local_sink_detect_success = detect_link_and_local_sink(link, reason); + + if (is_local_sink_detect_success && link->local_sink) +@@ -1359,6 +1364,10 @@ bool dc_link_detect(struct dc_link *link, enum dc_detect_reason reason) + link->dpcd_caps.is_mst_capable) + is_delegated_to_mst_top_mgr = discover_dp_mst_topology(link, reason); + ++ DC_LOG_DC("%s: link_index=%d is_local_sink_detect_success=%d pre_link_type=%d link_type=%d\n", __func__, ++ link->link_index, is_local_sink_detect_success, pre_link_type, link->type); ++ ++ + if (is_local_sink_detect_success && + pre_link_type == dc_connection_mst_branch && + link->type != dc_connection_mst_branch) +-- +2.39.2 + diff --git a/queue-6.2/series b/queue-6.2/series index 8ca0e5511eb..5214000432d 100644 --- a/queue-6.2/series +++ b/queue-6.2/series @@ -6,3 +6,4 @@ perf-fix-perf_event_context-time.patch tracing-hwlat-replace-sched_setaffinity-with-set_cpu.patch drm-amd-display-fix-k1-k2-divider-programming-for-ph.patch drm-amd-display-remove-otg-div-register-write-for-vi.patch +drm-amd-display-fix-dp-mst-sinks-removal-issue.patch