From: Doug Rupp Date: Tue, 29 Mar 2022 16:22:31 +0000 (-0700) Subject: [Ada] New port arm-qnx X-Git-Tag: basepoints/gcc-14~6623 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=1ef3f0911cf08f1b80c845ee7eee07ecf43b9c8a;p=thirdparty%2Fgcc.git [Ada] New port arm-qnx The QNX system specs for ARM and AARCH64 are identical. It makes more sense to have it named for the base architecture. gcc/ada/ * Makefile.rtl: Rename system-qnx-aarch64.ads to system-qnx-arm.ads. (AARCH64 QNX section): Modify to handle both arm and arch64. * tracebak.c (__QNX__): Add new __ARMEL__ section. * sigtramp-arm-qnx.c: New file. * libgnat/system-qnx-aarch64.ads: Renamed to ... * libgnat/system-qnx-arm.ads: this. --- diff --git a/gcc/ada/Makefile.rtl b/gcc/ada/Makefile.rtl index fde20d40717..e4ca894b14f 100644 --- a/gcc/ada/Makefile.rtl +++ b/gcc/ada/Makefile.rtl @@ -1493,8 +1493,8 @@ ifeq ($(strip $(filter-out arm% linux-androideabi,$(target_cpu) $(target_os))),) LIBRARY_VERSION := $(LIB_VERSION) endif -# AARCH64 QNX -ifeq ($(strip $(filter-out aarch64 %qnx,$(target_cpu) $(target_os))),) +# ARM and AARCH64 QNX +ifeq ($(strip $(filter-out arm aarch64 %qnx,$(target_cpu) $(target_os))),) LIBGNAT_TARGET_PAIRS = \ a-intnam.ads + +#include "sigtramp.h" +/* See sigtramp.h for a general explanation of functionality. */ + +/* ---------------------- + -- General comments -- + ---------------------- + + Stubs are generated from toplevel asms, + The general idea is to establish CFA as the sigcontext + and state where to find the registers as offsets from there. + + Note that the registers we "restore" here are those to which we have + direct access through the system sigcontext structure, which includes + only a partial set of the non-volatiles ABI-wise. */ + +/* ----------------------------------------- + -- Protypes for our internal asm stubs -- + ----------------------------------------- + + The registers are expected to be at SIGCONTEXT + 12 (reference the + sicontext structure in asm/sigcontext.h which describes the first + 3 * 4byte fields.) Even though our symbols will remain local, the + prototype claims "extern" and not "static" to prevent compiler complaints + about a symbol used but never defined. */ + +/* sigtramp stub providing unwind info for common registers. */ + +extern void __gnat_sigtramp_common + (int signo, void *siginfo, void *sigcontext, + __sigtramphandler_t * handler); + +void __gnat_sigtramp (int signo, void *si, void *sc, + __sigtramphandler_t * handler) + __attribute__((optimize(2))); + +void __gnat_sigtramp (int signo, void *si, void *ucontext, + __sigtramphandler_t * handler) +{ + struct sigcontext *mcontext = &((ucontext_t *) ucontext)->uc_mcontext; + + __gnat_sigtramp_common (signo, si, mcontext, handler); +} + +/* asm string construction helpers. */ + +#define STR(TEXT) #TEXT +/* stringify expanded TEXT, surrounding it with double quotes. */ + +#define S(E) STR(E) +/* stringify E, which will resolve as text but may contain macros + still to be expanded. */ + +/* asm (TEXT) outputs TEXT. These facilitate the output of + multiline contents: */ +#define TAB(S) "\t" S +#define CR(S) S "\n" + +#undef TCR +#define TCR(S) TAB(CR(S)) + +/* Trampoline body block + --------------------- */ + +#define SIGTRAMP_BODY \ +CR("") \ +TCR("# Allocate frame and also save r2 which is the argument register") \ +TCR("# containing the sigcontext, so that we can restore it during") \ +TCR("# unwinding and thereby load the rest of the desired context.") \ +TCR("stmfd sp!, {r2, r3, lr}") \ +TCR("# The unwinder undo's these operations in reverse order so starting") \ +TCR("# from bottom, restore r2 from the current vsp location, move r2 into") \ +TCR("# the vsp, add 12 bytes to get the start of the register save area") \ +TCR("# then restore the 15 general purpose registers of the frame which") \ +TCR("# raised the signal.") \ +TCR(".save {r0-r15}") \ +TCR(".pad #12") \ +TCR(".movsp r2") \ +TCR(".save {r2}") \ +TCR("# Call the real handler. The signo, siginfo and sigcontext") \ +TCR("# arguments are the same as those we received in r0, r1 and r2.") \ +TCR("blx r3") \ +TCR("# Restore our callee-saved items, release our frame and return") \ +TCR("# (should never get here!).") \ +TCR("ldmfd sp, {r2, r3, pc}") + +/* Symbol definition block + ----------------------- */ + +#define SIGTRAMP_START(SYM) \ +CR("# " S(SYM) " unwind trampoline") \ +TCR(".type " S(SYM) ", %function") \ +CR("") \ +CR(S(SYM) ":") \ +TCR(".fnstart") + +/* Symbol termination block + ------------------------ */ + +#define SIGTRAMP_END(SYM) \ +CR(".fnend") \ +TCR(".size " S(SYM) ", .-" S(SYM)) + +/*---------------------------- + -- And now, the real code -- + ---------------------------- */ + +/* Text section start. The compiler isn't aware of that switch. */ + +asm (".text\n" + TCR(".align 2")); + +/* sigtramp stub for common registers. */ + +#define TRAMP_COMMON __gnat_sigtramp_common + +asm (SIGTRAMP_START(TRAMP_COMMON)); +asm (SIGTRAMP_BODY); +asm (SIGTRAMP_END(TRAMP_COMMON)); diff --git a/gcc/ada/tracebak.c b/gcc/ada/tracebak.c index 6cc5d301737..f4e739d5ecf 100644 --- a/gcc/ada/tracebak.c +++ b/gcc/ada/tracebak.c @@ -555,6 +555,9 @@ is_return_from(void *symbol_addr, void *ret_addr) #if defined (__aarch64__) #define PC_ADJUST -4 +#elif defined (__ARMEL__) +#define PC_ADJUST -2 +#define USING_ARM_UNWINDING 1 #else #error Unhandled QNX architecture. #endif