From: claziss <claziss@138bc75d-0d04-0410-961f-82ee72b054a4>
Date: Wed, 13 Jun 2018 08:42:57 +0000 (+0000)
Subject: [ARC] Allow EX instruction unconditionally
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=234c8e0fd0695d0de2c31c50722c58e5a9a7642e;p=thirdparty%2Fgcc.git

[ARC] Allow EX instruction unconditionally

gcc/
2017-05-02  Claudiu Zissulescu  <claziss@synopsys.com>

	* config/arc/arc.c (atomic_exchangesi): EX instruction is default
	for ARC700 and ARCv2.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@261539 138bc75d-0d04-0410-961f-82ee72b054a4
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 93e02df51b81..5d3c396190bc 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2018-06-12  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* config/arc/arc.c (atomic_exchangesi): EX instruction is default
+	for ARC700 and ARCv2.
+
 2018-06-13  Chenghua Xu <paul.hua.gm@gmail.com>
 
 	PR target/86076
diff --git a/gcc/config/arc/atomic.md b/gcc/config/arc/atomic.md
index 13a2e34549c0..4a56ca229cc5 100644
--- a/gcc/config/arc/atomic.md
+++ b/gcc/config/arc/atomic.md
@@ -120,7 +120,7 @@
    (match_operand:SI 1 "mem_noofs_operand" "")
    (match_operand:SI 2 "register_operand" "")
    (match_operand:SI 3 "const_int_operand" "")]
-  "TARGET_ATOMIC"
+  "TARGET_ARC700 || TARGET_V2"
 {
   enum memmodel model = (enum memmodel) INTVAL (operands[3]);