From: Greg Kroah-Hartman Date: Fri, 6 Nov 2015 19:12:20 +0000 (-0800) Subject: 4.1-stable patches X-Git-Tag: v3.10.93~4 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=238ebb8d4d457e10a7f03b228aee100b10cf203c;p=thirdparty%2Fkernel%2Fstable-queue.git 4.1-stable patches added patches: dts-imx6-fix-sd-card-gpio-polarity-specified-in-device-tree.patch xen-fix-backport-of-previous-kexec-patch.patch --- diff --git a/queue-4.1/dts-imx6-fix-sd-card-gpio-polarity-specified-in-device-tree.patch b/queue-4.1/dts-imx6-fix-sd-card-gpio-polarity-specified-in-device-tree.patch new file mode 100644 index 00000000000..58fede7be18 --- /dev/null +++ b/queue-4.1/dts-imx6-fix-sd-card-gpio-polarity-specified-in-device-tree.patch @@ -0,0 +1,467 @@ +From 89c1a8cf63f8c69dfddb6e377c04df8b25ab1c88 Mon Sep 17 00:00:00 2001 +From: Dong Aisheng +Date: Wed, 22 Jul 2015 20:53:02 +0800 +Subject: dts: imx6: fix sd card gpio polarity specified in device tree + +From: Dong Aisheng + +commit 89c1a8cf63f8c69dfddb6e377c04df8b25ab1c88 upstream. + +cd-gpios polarity should be changed to GPIO_ACTIVE_LOW and wp-gpios +should be changed to GPIO_ACTIVE_HIGH. +Otherwise, the SD may not work properly due to wrong polarity inversion +specified in DT after switch to common parsing function mmc_of_parse(). + +Signed-off-by: Dong Aisheng +Acked-by: Shawn Guo +Signed-off-by: Ulf Hansson +Signed-off-by: Fabio Estevam +Signed-off-by: Greg Kroah-Hartman + +--- + arch/arm/boot/dts/imx6dl-riotboard.dts | 8 ++++---- + arch/arm/boot/dts/imx6q-arm2.dts | 5 +++-- + arch/arm/boot/dts/imx6q-gk802.dts | 3 ++- + arch/arm/boot/dts/imx6q-tbs2910.dts | 4 ++-- + arch/arm/boot/dts/imx6qdl-aristainetos.dtsi | 4 ++-- + arch/arm/boot/dts/imx6qdl-cubox-i.dtsi | 2 +- + arch/arm/boot/dts/imx6qdl-dfi-fs700-m60.dtsi | 4 +++- + arch/arm/boot/dts/imx6qdl-gw52xx.dtsi | 2 +- + arch/arm/boot/dts/imx6qdl-gw53xx.dtsi | 2 +- + arch/arm/boot/dts/imx6qdl-gw54xx.dtsi | 2 +- + arch/arm/boot/dts/imx6qdl-hummingboard.dtsi | 3 ++- + arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi | 4 ++-- + arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi | 8 ++++---- + arch/arm/boot/dts/imx6qdl-rex.dtsi | 4 ++-- + arch/arm/boot/dts/imx6qdl-sabreauto.dtsi | 4 ++-- + arch/arm/boot/dts/imx6qdl-sabrelite.dtsi | 6 +++--- + arch/arm/boot/dts/imx6qdl-sabresd.dtsi | 8 ++++---- + arch/arm/boot/dts/imx6qdl-tx6.dtsi | 4 ++-- + arch/arm/boot/dts/imx6qdl-wandboard.dtsi | 6 ++++-- + arch/arm/boot/dts/imx6sl-evk.dts | 10 +++++----- + arch/arm/boot/dts/imx6sx-sabreauto.dts | 4 ++-- + arch/arm/boot/dts/imx6sx-sdb.dtsi | 4 ++-- + 22 files changed, 54 insertions(+), 47 deletions(-) + +--- a/arch/arm/boot/dts/imx6dl-riotboard.dts ++++ b/arch/arm/boot/dts/imx6dl-riotboard.dts +@@ -305,8 +305,8 @@ + &usdhc2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc2>; +- cd-gpios = <&gpio1 4 0>; +- wp-gpios = <&gpio1 2 0>; ++ cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; ++ wp-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; + vmmc-supply = <®_3p3v>; + status = "okay"; + }; +@@ -314,8 +314,8 @@ + &usdhc3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc3>; +- cd-gpios = <&gpio7 0 0>; +- wp-gpios = <&gpio7 1 0>; ++ cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>; ++ wp-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>; + vmmc-supply = <®_3p3v>; + status = "okay"; + }; +--- a/arch/arm/boot/dts/imx6q-arm2.dts ++++ b/arch/arm/boot/dts/imx6q-arm2.dts +@@ -11,6 +11,7 @@ + */ + + /dts-v1/; ++#include + #include "imx6q.dtsi" + + / { +@@ -196,8 +197,8 @@ + }; + + &usdhc3 { +- cd-gpios = <&gpio6 11 0>; +- wp-gpios = <&gpio6 14 0>; ++ cd-gpios = <&gpio6 11 GPIO_ACTIVE_LOW>; ++ wp-gpios = <&gpio6 14 GPIO_ACTIVE_HIGH>; + vmmc-supply = <®_3p3v>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc3 +--- a/arch/arm/boot/dts/imx6q-gk802.dts ++++ b/arch/arm/boot/dts/imx6q-gk802.dts +@@ -7,6 +7,7 @@ + */ + + /dts-v1/; ++#include + #include "imx6q.dtsi" + + / { +@@ -161,7 +162,7 @@ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc3>; + bus-width = <4>; +- cd-gpios = <&gpio6 11 0>; ++ cd-gpios = <&gpio6 11 GPIO_ACTIVE_LOW>; + vmmc-supply = <®_3p3v>; + status = "okay"; + }; +--- a/arch/arm/boot/dts/imx6q-tbs2910.dts ++++ b/arch/arm/boot/dts/imx6q-tbs2910.dts +@@ -251,7 +251,7 @@ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc2>; + bus-width = <4>; +- cd-gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>; ++ cd-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>; + vmmc-supply = <®_3p3v>; + status = "okay"; + }; +@@ -260,7 +260,7 @@ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc3>; + bus-width = <4>; +- cd-gpios = <&gpio2 0 GPIO_ACTIVE_HIGH>; ++ cd-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>; + wp-gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>; + vmmc-supply = <®_3p3v>; + status = "okay"; +--- a/arch/arm/boot/dts/imx6qdl-aristainetos.dtsi ++++ b/arch/arm/boot/dts/imx6qdl-aristainetos.dtsi +@@ -173,7 +173,7 @@ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc1>; + vmmc-supply = <®_3p3v>; +- cd-gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; ++ cd-gpios = <&gpio4 7 GPIO_ACTIVE_LOW>; + status = "okay"; + }; + +@@ -181,7 +181,7 @@ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc2>; + vmmc-supply = <®_3p3v>; +- cd-gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>; ++ cd-gpios = <&gpio4 8 GPIO_ACTIVE_LOW>; + status = "okay"; + }; + +--- a/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi ++++ b/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi +@@ -259,6 +259,6 @@ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_cubox_i_usdhc2_aux &pinctrl_cubox_i_usdhc2>; + vmmc-supply = <®_3p3v>; +- cd-gpios = <&gpio1 4 0>; ++ cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; + status = "okay"; + }; +--- a/arch/arm/boot/dts/imx6qdl-dfi-fs700-m60.dtsi ++++ b/arch/arm/boot/dts/imx6qdl-dfi-fs700-m60.dtsi +@@ -1,3 +1,5 @@ ++#include ++ + / { + regulators { + compatible = "simple-bus"; +@@ -181,7 +183,7 @@ + &usdhc2 { /* module slot */ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc2>; +- cd-gpios = <&gpio2 2 0>; ++ cd-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>; + status = "okay"; + }; + +--- a/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi ++++ b/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi +@@ -318,7 +318,7 @@ + &usdhc3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc3>; +- cd-gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>; ++ cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>; + vmmc-supply = <®_3p3v>; + status = "okay"; + }; +--- a/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi ++++ b/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi +@@ -324,7 +324,7 @@ + &usdhc3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc3>; +- cd-gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>; ++ cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>; + vmmc-supply = <®_3p3v>; + status = "okay"; + }; +--- a/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi ++++ b/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi +@@ -417,7 +417,7 @@ + &usdhc3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc3>; +- cd-gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>; ++ cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>; + vmmc-supply = <®_3p3v>; + status = "okay"; + }; +--- a/arch/arm/boot/dts/imx6qdl-hummingboard.dtsi ++++ b/arch/arm/boot/dts/imx6qdl-hummingboard.dtsi +@@ -41,6 +41,7 @@ + */ + #include "imx6qdl-microsom.dtsi" + #include "imx6qdl-microsom-ar8035.dtsi" ++#include + + / { + chosen { +@@ -288,6 +289,6 @@ + &pinctrl_hummingboard_usdhc2 + >; + vmmc-supply = <®_3p3v>; +- cd-gpios = <&gpio1 4 0>; ++ cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; + status = "okay"; + }; +--- a/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi ++++ b/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi +@@ -449,7 +449,7 @@ + &usdhc3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc3>; +- cd-gpios = <&gpio7 0 0>; ++ cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>; + vmmc-supply = <®_3p3v>; + status = "okay"; + }; +@@ -457,7 +457,7 @@ + &usdhc4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc4>; +- cd-gpios = <&gpio2 6 0>; ++ cd-gpios = <&gpio2 6 GPIO_ACTIVE_LOW>; + vmmc-supply = <®_3p3v>; + status = "okay"; + }; +--- a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi ++++ b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi +@@ -409,8 +409,8 @@ + &usdhc2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc2>; +- cd-gpios = <&gpio1 4 0>; +- wp-gpios = <&gpio1 2 0>; ++ cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; ++ wp-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; + status = "disabled"; + }; + +@@ -418,7 +418,7 @@ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc3 + &pinctrl_usdhc3_cdwp>; +- cd-gpios = <&gpio1 27 0>; +- wp-gpios = <&gpio1 29 0>; ++ cd-gpios = <&gpio1 27 GPIO_ACTIVE_LOW>; ++ wp-gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>; + status = "disabled"; + }; +--- a/arch/arm/boot/dts/imx6qdl-rex.dtsi ++++ b/arch/arm/boot/dts/imx6qdl-rex.dtsi +@@ -340,7 +340,7 @@ + pinctrl-0 = <&pinctrl_usdhc2>; + bus-width = <4>; + cd-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>; +- wp-gpios = <&gpio2 3 GPIO_ACTIVE_LOW>; ++ wp-gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>; + status = "okay"; + }; + +@@ -349,6 +349,6 @@ + pinctrl-0 = <&pinctrl_usdhc3>; + bus-width = <4>; + cd-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>; +- wp-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>; ++ wp-gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>; + status = "okay"; + }; +--- a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi ++++ b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi +@@ -467,8 +467,8 @@ + pinctrl-0 = <&pinctrl_usdhc3>; + pinctrl-1 = <&pinctrl_usdhc3_100mhz>; + pinctrl-2 = <&pinctrl_usdhc3_200mhz>; +- cd-gpios = <&gpio6 15 0>; +- wp-gpios = <&gpio1 13 0>; ++ cd-gpios = <&gpio6 15 GPIO_ACTIVE_LOW>; ++ wp-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>; + status = "okay"; + }; + +--- a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi ++++ b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi +@@ -444,8 +444,8 @@ + &usdhc3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc3>; +- cd-gpios = <&gpio7 0 0>; +- wp-gpios = <&gpio7 1 0>; ++ cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>; ++ wp-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>; + vmmc-supply = <®_3p3v>; + status = "okay"; + }; +@@ -453,7 +453,7 @@ + &usdhc4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc4>; +- cd-gpios = <&gpio2 6 0>; ++ cd-gpios = <&gpio2 6 GPIO_ACTIVE_LOW>; + vmmc-supply = <®_3p3v>; + status = "okay"; + }; +--- a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi ++++ b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi +@@ -562,8 +562,8 @@ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc2>; + bus-width = <8>; +- cd-gpios = <&gpio2 2 0>; +- wp-gpios = <&gpio2 3 0>; ++ cd-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>; ++ wp-gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>; + status = "okay"; + }; + +@@ -571,8 +571,8 @@ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc3>; + bus-width = <8>; +- cd-gpios = <&gpio2 0 0>; +- wp-gpios = <&gpio2 1 0>; ++ cd-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>; ++ wp-gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>; + status = "okay"; + }; + +--- a/arch/arm/boot/dts/imx6qdl-tx6.dtsi ++++ b/arch/arm/boot/dts/imx6qdl-tx6.dtsi +@@ -680,7 +680,7 @@ + pinctrl-0 = <&pinctrl_usdhc1>; + bus-width = <4>; + no-1-8-v; +- cd-gpios = <&gpio7 2 0>; ++ cd-gpios = <&gpio7 2 GPIO_ACTIVE_LOW>; + fsl,wp-controller; + status = "okay"; + }; +@@ -690,7 +690,7 @@ + pinctrl-0 = <&pinctrl_usdhc2>; + bus-width = <4>; + no-1-8-v; +- cd-gpios = <&gpio7 3 0>; ++ cd-gpios = <&gpio7 3 GPIO_ACTIVE_LOW>; + fsl,wp-controller; + status = "okay"; + }; +--- a/arch/arm/boot/dts/imx6qdl-wandboard.dtsi ++++ b/arch/arm/boot/dts/imx6qdl-wandboard.dtsi +@@ -9,6 +9,8 @@ + * + */ + ++#include ++ + / { + regulators { + compatible = "simple-bus"; +@@ -250,13 +252,13 @@ + &usdhc1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc1>; +- cd-gpios = <&gpio1 2 0>; ++ cd-gpios = <&gpio1 2 GPIO_ACTIVE_LOW>; + status = "okay"; + }; + + &usdhc3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc3>; +- cd-gpios = <&gpio3 9 0>; ++ cd-gpios = <&gpio3 9 GPIO_ACTIVE_LOW>; + status = "okay"; + }; +--- a/arch/arm/boot/dts/imx6sl-evk.dts ++++ b/arch/arm/boot/dts/imx6sl-evk.dts +@@ -617,8 +617,8 @@ + pinctrl-1 = <&pinctrl_usdhc1_100mhz>; + pinctrl-2 = <&pinctrl_usdhc1_200mhz>; + bus-width = <8>; +- cd-gpios = <&gpio4 7 0>; +- wp-gpios = <&gpio4 6 0>; ++ cd-gpios = <&gpio4 7 GPIO_ACTIVE_LOW>; ++ wp-gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; + status = "okay"; + }; + +@@ -627,8 +627,8 @@ + pinctrl-0 = <&pinctrl_usdhc2>; + pinctrl-1 = <&pinctrl_usdhc2_100mhz>; + pinctrl-2 = <&pinctrl_usdhc2_200mhz>; +- cd-gpios = <&gpio5 0 0>; +- wp-gpios = <&gpio4 29 0>; ++ cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>; ++ wp-gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>; + status = "okay"; + }; + +@@ -637,6 +637,6 @@ + pinctrl-0 = <&pinctrl_usdhc3>; + pinctrl-1 = <&pinctrl_usdhc3_100mhz>; + pinctrl-2 = <&pinctrl_usdhc3_200mhz>; +- cd-gpios = <&gpio3 22 0>; ++ cd-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>; + status = "okay"; + }; +--- a/arch/arm/boot/dts/imx6sx-sabreauto.dts ++++ b/arch/arm/boot/dts/imx6sx-sabreauto.dts +@@ -49,7 +49,7 @@ + pinctrl-1 = <&pinctrl_usdhc3_100mhz>; + pinctrl-2 = <&pinctrl_usdhc3_200mhz>; + bus-width = <8>; +- cd-gpios = <&gpio7 10 GPIO_ACTIVE_HIGH>; ++ cd-gpios = <&gpio7 10 GPIO_ACTIVE_LOW>; + wp-gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>; + keep-power-in-suspend; + enable-sdio-wakeup; +@@ -61,7 +61,7 @@ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc4>; + bus-width = <8>; +- cd-gpios = <&gpio7 11 GPIO_ACTIVE_HIGH>; ++ cd-gpios = <&gpio7 11 GPIO_ACTIVE_LOW>; + no-1-8-v; + keep-power-in-suspend; + enable-sdio-wakup; +--- a/arch/arm/boot/dts/imx6sx-sdb.dtsi ++++ b/arch/arm/boot/dts/imx6sx-sdb.dtsi +@@ -293,7 +293,7 @@ + pinctrl-1 = <&pinctrl_usdhc3_100mhz>; + pinctrl-2 = <&pinctrl_usdhc3_200mhz>; + bus-width = <8>; +- cd-gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>; ++ cd-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>; + wp-gpios = <&gpio2 15 GPIO_ACTIVE_HIGH>; + keep-power-in-suspend; + enable-sdio-wakeup; +@@ -304,7 +304,7 @@ + &usdhc4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc4>; +- cd-gpios = <&gpio6 21 GPIO_ACTIVE_HIGH>; ++ cd-gpios = <&gpio6 21 GPIO_ACTIVE_LOW>; + wp-gpios = <&gpio6 20 GPIO_ACTIVE_HIGH>; + status = "okay"; + }; diff --git a/queue-4.1/series b/queue-4.1/series index d2044255b0d..2cc88e91377 100644 --- a/queue-4.1/series +++ b/queue-4.1/series @@ -82,3 +82,5 @@ thp-use-is_zero_pfn-only-after-pte_present-check.patch pinctrl-baytrail-serialize-all-register-access.patch pinctrl-baytrail-use-raw_spinlock-for-locking.patch serial-8250_pci-add-support-for-12-port-exar-boards.patch +xen-fix-backport-of-previous-kexec-patch.patch +dts-imx6-fix-sd-card-gpio-polarity-specified-in-device-tree.patch diff --git a/queue-4.1/xen-fix-backport-of-previous-kexec-patch.patch b/queue-4.1/xen-fix-backport-of-previous-kexec-patch.patch new file mode 100644 index 00000000000..3dc875e7d80 --- /dev/null +++ b/queue-4.1/xen-fix-backport-of-previous-kexec-patch.patch @@ -0,0 +1,50 @@ +From foo@baz Fri Nov 6 11:07:07 PST 2015 +Date: Fri, 06 Nov 2015 11:07:07 -0800 +To: Greg KH +From: Greg Kroah-Hartman +Subject: xen: fix backport of previous kexec patch + +Fixes the backport of 0b34a166f291d255755be46e43ed5497cdd194f2 upstream + +Commit 0b34a166f291d255755be46e43ed5497cdd194f2 "x86/xen: Support +kexec/kdump in HVM guests by doing a soft reset" has been added to the +4.2-stable tree" needed to correct the CONFIG variable, as +CONFIG_KEXEC_CORE only showed up in 4.3. + +Reported-by: David Vrabel +Reported-by: Luis Henriques +Signed-off-by: Greg Kroah-Hartman + +--- + arch/x86/xen/enlighten.c | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +--- a/arch/x86/xen/enlighten.c ++++ b/arch/x86/xen/enlighten.c +@@ -33,7 +33,7 @@ + #include + #include + +-#ifdef CONFIG_KEXEC_CORE ++#ifdef CONFIG_KEXEC + #include + #endif + +@@ -1802,7 +1802,7 @@ static struct notifier_block xen_hvm_cpu + .notifier_call = xen_hvm_cpu_notify, + }; + +-#ifdef CONFIG_KEXEC_CORE ++#ifdef CONFIG_KEXEC + static void xen_hvm_shutdown(void) + { + native_machine_shutdown(); +@@ -1836,7 +1836,7 @@ static void __init xen_hvm_guest_init(vo + x86_init.irqs.intr_init = xen_init_IRQ; + xen_hvm_init_time_ops(); + xen_hvm_init_mmu_ops(); +-#ifdef CONFIG_KEXEC_CORE ++#ifdef CONFIG_KEXEC + machine_ops.shutdown = xen_hvm_shutdown; + machine_ops.crash_shutdown = xen_hvm_crash_shutdown; + #endif