From: Cédric Le Goater Date: Wed, 12 Jan 2022 10:28:26 +0000 (+0100) Subject: target/ppc: Add popcntb instruction to POWER5+ processors X-Git-Tag: v7.0.0-rc0~93^2~32 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=23ab6d8813685c38fd1d87f573dded9fe37ee17f;p=thirdparty%2Fqemu.git target/ppc: Add popcntb instruction to POWER5+ processors popcntb instruction was added in ISA v2.02. Add support for POWER5+ processors since they implement ISA v2.03. PPC970 CPUs implement v2.01 and do not support popcntb. Signed-off-by: Cédric Le Goater Reviewed-by: Fabiano Rosas Message-Id: <20220105095142.3990430-2-clg@kaod.org> Signed-off-by: Cédric Le Goater --- diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index cc93bff3fac..f15a52259c9 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -6957,6 +6957,7 @@ POWERPC_FAMILY(POWER5P)(ObjectClass *oc, void *data) PPC_MEM_SYNC | PPC_MEM_EIEIO | PPC_MEM_TLBIE | PPC_MEM_TLBSYNC | PPC_64B | + PPC_POPCNTB | PPC_SEGMENT_64B | PPC_SLBI; pcc->insns_flags2 = PPC2_FP_CVT_S64; pcc->msr_mask = (1ull << MSR_SF) |