From: Ville Syrjälä Date: Tue, 29 Oct 2024 21:52:13 +0000 (+0200) Subject: drm/i915/cdclk: Factor out INTEL_OUTPUT_DSI check in vlv_dsi_min_cdclk() X-Git-Tag: v6.14-rc1~174^2~12^2~148 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=252cea7f0fb41057c899bdfdd78f1b04a1ffe75d;p=thirdparty%2Fkernel%2Flinux.git drm/i915/cdclk: Factor out INTEL_OUTPUT_DSI check in vlv_dsi_min_cdclk() All the if statements in vlv_dsi_min_cdclk() check for INTEL_OUTPUT_DSI. Make life simpler by checking that just once at the start. Signed-off-by: Ville Syrjälä Link: https://patchwork.freedesktop.org/patch/msgid/20241029215217.3697-8-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula --- diff --git a/drivers/gpu/drm/i915/display/vlv_dsi.c b/drivers/gpu/drm/i915/display/vlv_dsi.c index 149cbfec5d48a..d49e9b3c76279 100644 --- a/drivers/gpu/drm/i915/display/vlv_dsi.c +++ b/drivers/gpu/drm/i915/display/vlv_dsi.c @@ -1762,26 +1762,26 @@ static void vlv_dphy_param_init(struct intel_dsi *intel_dsi) int vlv_dsi_min_cdclk(const struct intel_crtc_state *crtc_state) { struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); - int min_cdclk = 0; + + if (!intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DSI)) + return 0; /* * On Valleyview some DSI panels lose (v|h)sync when the clock is lower * than 320000KHz. */ - if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DSI) && - IS_VALLEYVIEW(dev_priv)) - min_cdclk = max(320000, min_cdclk); + if (IS_VALLEYVIEW(dev_priv)) + return 320000; /* * On Geminilake once the CDCLK gets as low as 79200 * picture gets unstable, despite that values are * correct for DSI PLL and DE PLL. */ - if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DSI) && - IS_GEMINILAKE(dev_priv)) - min_cdclk = max(158400, min_cdclk); + if (IS_GEMINILAKE(dev_priv)) + return 158400; - return min_cdclk; + return 0; } typedef void (*vlv_dsi_dmi_quirk_func)(struct intel_dsi *intel_dsi);