From: Greg Kroah-Hartman Date: Wed, 5 Feb 2014 00:41:20 +0000 (+0100) Subject: 3.13-stable patches X-Git-Tag: v3.4.79~2 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=25602c22e47db857a708b601944b1e05bb472b33;p=thirdparty%2Fkernel%2Fstable-queue.git 3.13-stable patches added patches: x86-cpu-amd-add-workaround-for-family-16h-erratum-793.patch --- diff --git a/queue-3.13/series b/queue-3.13/series index 83b0d29ead1..de69c70d980 100644 --- a/queue-3.13/series +++ b/queue-3.13/series @@ -109,3 +109,4 @@ arm-mvebu-add-quirk-for-i2c-for-the-openblocks-ax3-4-board.patch i2c-mv64xxx-fix-bus-hang-on-a0-version-of-the-armada-xp-socs.patch i2c-mv64xxx-document-the-newly-introduced-armada-xp-a0-compatible.patch i2c-piix4-add-support-for-amd-ml-and-cz-smbus-changes.patch +x86-cpu-amd-add-workaround-for-family-16h-erratum-793.patch diff --git a/queue-3.13/x86-cpu-amd-add-workaround-for-family-16h-erratum-793.patch b/queue-3.13/x86-cpu-amd-add-workaround-for-family-16h-erratum-793.patch new file mode 100644 index 00000000000..3a9713dcbd5 --- /dev/null +++ b/queue-3.13/x86-cpu-amd-add-workaround-for-family-16h-erratum-793.patch @@ -0,0 +1,82 @@ +From 3b56496865f9f7d9bcb2f93b44c63f274f08e3b6 Mon Sep 17 00:00:00 2001 +From: Borislav Petkov +Date: Wed, 15 Jan 2014 00:07:11 +0100 +Subject: x86, cpu, amd: Add workaround for family 16h, erratum 793 + +From: Borislav Petkov + +commit 3b56496865f9f7d9bcb2f93b44c63f274f08e3b6 upstream. + +This adds the workaround for erratum 793 as a precaution in case not +every BIOS implements it. This addresses CVE-2013-6885. + +Erratum text: + +[Revision Guide for AMD Family 16h Models 00h-0Fh Processors, +document 51810 Rev. 3.04 November 2013] + +793 Specific Combination of Writes to Write Combined Memory Types and +Locked Instructions May Cause Core Hang + +Description + +Under a highly specific and detailed set of internal timing +conditions, a locked instruction may trigger a timing sequence whereby +the write to a write combined memory type is not flushed, causing the +locked instruction to stall indefinitely. + +Potential Effect on System + +Processor core hang. + +Suggested Workaround + +BIOS should set MSR +C001_1020[15] = 1b. + +Fix Planned + +No fix planned + +[ hpa: updated description, fixed typo in MSR name ] + +Signed-off-by: Borislav Petkov +Link: http://lkml.kernel.org/r/20140114230711.GS29865@pd.tnic +Tested-by: Aravind Gopalakrishnan +Signed-off-by: H. Peter Anvin +Signed-off-by: Greg Kroah-Hartman + +--- + arch/x86/include/uapi/asm/msr-index.h | 1 + + arch/x86/kernel/cpu/amd.c | 10 ++++++++++ + 2 files changed, 11 insertions(+) + +--- a/arch/x86/include/uapi/asm/msr-index.h ++++ b/arch/x86/include/uapi/asm/msr-index.h +@@ -184,6 +184,7 @@ + #define MSR_AMD64_PATCH_LOADER 0xc0010020 + #define MSR_AMD64_OSVW_ID_LENGTH 0xc0010140 + #define MSR_AMD64_OSVW_STATUS 0xc0010141 ++#define MSR_AMD64_LS_CFG 0xc0011020 + #define MSR_AMD64_DC_CFG 0xc0011022 + #define MSR_AMD64_BU_CFG2 0xc001102a + #define MSR_AMD64_IBSFETCHCTL 0xc0011030 +--- a/arch/x86/kernel/cpu/amd.c ++++ b/arch/x86/kernel/cpu/amd.c +@@ -508,6 +508,16 @@ static void early_init_amd(struct cpuinf + set_cpu_cap(c, X86_FEATURE_EXTD_APICID); + } + #endif ++ ++ /* F16h erratum 793, CVE-2013-6885 */ ++ if (c->x86 == 0x16 && c->x86_model <= 0xf) { ++ u64 val; ++ ++ rdmsrl(MSR_AMD64_LS_CFG, val); ++ if (!(val & BIT(15))) ++ wrmsrl(MSR_AMD64_LS_CFG, val | BIT(15)); ++ } ++ + } + + static const int amd_erratum_383[];