From: Paul Cercueil Date: Sun, 20 May 2018 16:31:13 +0000 (+0000) Subject: clk: ingenic: Support specifying "wait for clock stable" delay X-Git-Tag: v4.18-rc1~79^2~4^3~4 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=261a831f042c906412099e8a4f73d954cb5370b4;p=thirdparty%2Flinux.git clk: ingenic: Support specifying "wait for clock stable" delay Some clocks need a small delay after being ungated to run stable, as using them too soon might result in hardware lockups. Signed-off-by: Paul Cercueil Signed-off-by: Stephen Boyd --- diff --git a/drivers/clk/ingenic/cgu.c b/drivers/clk/ingenic/cgu.c index 4b31145eb8aae..5ef7d9ba2195d 100644 --- a/drivers/clk/ingenic/cgu.c +++ b/drivers/clk/ingenic/cgu.c @@ -512,6 +512,9 @@ static int ingenic_clk_enable(struct clk_hw *hw) spin_lock_irqsave(&cgu->lock, flags); ingenic_cgu_gate_set(cgu, &clk_info->gate, false); spin_unlock_irqrestore(&cgu->lock, flags); + + if (clk_info->gate.delay_us) + udelay(clk_info->gate.delay_us); } return 0; diff --git a/drivers/clk/ingenic/cgu.h b/drivers/clk/ingenic/cgu.h index 4d2e3fad0e30c..542192376ebff 100644 --- a/drivers/clk/ingenic/cgu.h +++ b/drivers/clk/ingenic/cgu.h @@ -112,11 +112,13 @@ struct ingenic_cgu_fixdiv_info { * @reg: offset of the gate control register within the CGU * @bit: offset of the bit in the register that controls the gate * @clear_to_gate: if set, the clock is gated when the bit is cleared + * @delay_us: delay in microseconds after which the clock is considered stable */ struct ingenic_cgu_gate_info { unsigned reg; u8 bit; bool clear_to_gate; + u16 delay_us; }; /**