From: Juzhe-Zhong Date: Wed, 30 Aug 2023 11:49:41 +0000 (+0800) Subject: test: Add xfail into slp-reduc-7.c for RVV VLA vectorization X-Git-Tag: basepoints/gcc-15~6565 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=282c33c5f1c9b2965c18877aea8466701ab4e678;p=thirdparty%2Fgcc.git test: Add xfail into slp-reduc-7.c for RVV VLA vectorization Like ARM SVE, add RVV variable length xfail. gcc/testsuite/ChangeLog: * gcc.dg/vect/slp-reduc-7.c: Add RVV. --- diff --git a/gcc/testsuite/gcc.dg/vect/slp-reduc-7.c b/gcc/testsuite/gcc.dg/vect/slp-reduc-7.c index 7a958f24733a..a8528ab53ee2 100644 --- a/gcc/testsuite/gcc.dg/vect/slp-reduc-7.c +++ b/gcc/testsuite/gcc.dg/vect/slp-reduc-7.c @@ -57,5 +57,5 @@ int main (void) /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail vect_no_int_add } } } */ /* For variable-length SVE, the number of scalar statements in the reduction exceeds the number of elements in a 128-bit granule. */ -/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" { xfail { vect_no_int_add || { aarch64_sve && vect_variable_length } } } } } */ +/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" { xfail { vect_no_int_add || { { aarch64_sve && vect_variable_length } || { riscv_vector && vect_variable_length } } } } } } */ /* { dg-final { scan-tree-dump-times "VEC_PERM_EXPR" 0 "vect" { xfail { aarch64_sve && vect_variable_length } } } } */