From: Richard Henderson <rth@redhat.com>
Date: Thu, 28 Oct 2004 17:21:00 +0000 (-0700)
Subject: alpha.md (movqicc_internal): Allow exactly one zero in the conditional.
X-Git-Tag: releases/gcc-4.0.0~3609
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=283dd63338be451405f9e22f45fbb2bcae4967e3;p=thirdparty%2Fgcc.git

alpha.md (movqicc_internal): Allow exactly one zero in the conditional.

        * config/alpha/alpha.md (movqicc_internal): Allow exactly one
        zero in the conditional.
        (movhicc_internal, movsicc_internal, movdicc_internal): Likewise.

From-SVN: r89766
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 5277f53e2882..75e9cb280ecb 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2004-10-28  Richard Henderson  <rth@redhat.com>
+
+	* config/alpha/alpha.md (movqicc_internal): Allow exactly one
+	zero in the conditional.
+	(movhicc_internal, movsicc_internal, movdicc_internal): Likewise.
+
 2004-10-28  Richard Henderson  <rth@redhat.com>
 
 	* cse.c (memory_extend_rtx): Remove.
diff --git a/gcc/config/alpha/alpha.md b/gcc/config/alpha/alpha.md
index 09967b584170..ed47e9fe1dc8 100644
--- a/gcc/config/alpha/alpha.md
+++ b/gcc/config/alpha/alpha.md
@@ -3061,7 +3061,7 @@
 			  (match_operand:DI 4 "reg_or_0_operand" "J,J,rJ,rJ")])
 	 (match_operand:QI 1 "add_operand" "rI,0,rI,0")
 	 (match_operand:QI 5 "add_operand" "0,rI,0,rI")))]
-  "(operands[3] == const0_rtx || operands[4] == const0_rtx)"
+  "(operands[3] == const0_rtx) ^ (operands[4] == const0_rtx)"
   "@
    cmov%C2 %r3,%1,%0
    cmov%D2 %r3,%5,%0
@@ -3077,7 +3077,7 @@
 			  (match_operand:DI 4 "reg_or_0_operand" "J,J,rJ,rJ")])
 	 (match_operand:HI 1 "add_operand" "rI,0,rI,0")
 	 (match_operand:HI 5 "add_operand" "0,rI,0,rI")))]
-  "(operands[3] == const0_rtx || operands[4] == const0_rtx)"
+  "(operands[3] == const0_rtx) ^ (operands[4] == const0_rtx)"
   "@
    cmov%C2 %r3,%1,%0
    cmov%D2 %r3,%5,%0
@@ -3093,7 +3093,7 @@
 			  (match_operand:DI 4 "reg_or_0_operand" "J,J,rJ,rJ")])
 	 (match_operand:SI 1 "add_operand" "rI,0,rI,0")
 	 (match_operand:SI 5 "add_operand" "0,rI,0,rI")))]
-  "(operands[3] == const0_rtx || operands[4] == const0_rtx)"
+  "(operands[3] == const0_rtx) ^ (operands[4] == const0_rtx)"
   "@
    cmov%C2 %r3,%1,%0
    cmov%D2 %r3,%5,%0
@@ -3109,7 +3109,7 @@
 			  (match_operand:DI 4 "reg_or_0_operand" "J,J,rJ,rJ")])
 	 (match_operand:DI 1 "add_operand" "rI,0,rI,0")
 	 (match_operand:DI 5 "add_operand" "0,rI,0,rI")))]
-  "(operands[3] == const0_rtx || operands[4] == const0_rtx)"
+  "(operands[3] == const0_rtx) ^ (operands[4] == const0_rtx)"
   "@
    cmov%C2 %r3,%1,%0
    cmov%D2 %r3,%5,%0