From: Marc Kleine-Budde Date: Wed, 19 Feb 2025 10:09:29 +0000 (+0100) Subject: Merge patch series "add FlexCAN support for S32G2/S32G3 SoCs" X-Git-Tag: v6.15-rc1~160^2~269^2~5 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=28daf9a3cd8e66b6cb80be2bdb3dc2e79095f7eb;p=thirdparty%2Flinux.git Merge patch series "add FlexCAN support for S32G2/S32G3 SoCs" Ciprian Costea says: S32G2 and S32G3 SoCs share the FlexCAN module with i.MX SoCs, with some hardware integration particularities. Main difference covered by this patch-set relates to interrupt management. On S32G2/S32G3 SoC, there are separate interrupts for state change, bus errors, MBs 0-7 and MBs 8-127 respectively. Changes in V4: - Updated IRQ description in bindings documentation - Fixed some small issues with the proposed changes in the flexcan binding documentation Changes in V3: - Added Vincent Mailhol's Reviewed-by tag on the second patch - Changed to 'platform_get_irq_byname' for second range of mailboxes - Made several rephasing in bindings doc - Removed Frank Li's Reviewed-by tags since changes were made afterwards. Changes in V2: - Separated 'FLEXCAN_QUIRK_NR_IRQ_3' quirk addition from S32G SoC Flexcan support. - Provided more information in dt-bindings documentation with respect to FlexCAN module integration on S32G SoCs. - Fixed and IRQ resource freeing management issue. Link: https://patch.msgid.link/20250113120704.522307-1-ciprianmarian.costea@oss.nxp.com Signed-off-by: Marc Kleine-Budde --- 28daf9a3cd8e66b6cb80be2bdb3dc2e79095f7eb