From: Uros Bizjak Date: Thu, 27 Aug 2009 20:54:28 +0000 (+0200) Subject: re PR rtl-optimization/40861 (ICE in simplify_subreg, at simplify-rtx.c:4981) X-Git-Tag: releases/gcc-4.5.0~3815 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=2b3b22d35eb3243b1974de38f7cd8ae399f8de49;p=thirdparty%2Fgcc.git re PR rtl-optimization/40861 (ICE in simplify_subreg, at simplify-rtx.c:4981) PR rtl-optimization/40861 * simplify-rtx.c (simplify_subreg): Do not call simplify_gen_subreg to extract word from a multi-word subreg for negative byte positions. testsuite/ChangeLog: PR rtl-optimization/40861 * gcc.dg/pr40861.c: New test. From-SVN: r151149 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index df916f54dec1..8b69b45b6ee7 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,8 +1,13 @@ +2009-08-27 Uros Bizjak + + PR rtl-optimization/40861 + * simplify-rtx.c (simplify_subreg): Do not call simplify_gen_subreg to + extract word from a multi-word subreg for negative byte positions. + 2009-08-27 Tristan Gingold Douglas B Rupp - * config/ia64/ia64.c (ia64_attribute_table): Add "common_object" - entry. + * config/ia64/ia64.c (ia64_attribute_table): Add "common_object" entry. (SECTION_VMS_OVERLAY): Define. (ia64_vms_common_object_attribute): Added. Handle the "common_object" attribute. @@ -467,8 +472,7 @@ (sse_maskcmpv4sf3): Disable if SSE5. (sse_maskcmpv2df3): Ditto. (sse_vmmaskcmpv4sf3): Ditto. - (sse5_fmadd4): Add SSE5 floating point multiply/add - instructions. + (sse5_fmadd4): Add SSE5 floating point multiply/add instructions. (sse5_vmfmadd4): Ditto. (sse5_fmsub4): Ditto. (sse5_vmfmsub4): Ditto. diff --git a/gcc/simplify-rtx.c b/gcc/simplify-rtx.c index e3809a850000..0cf1dd0ce943 100644 --- a/gcc/simplify-rtx.c +++ b/gcc/simplify-rtx.c @@ -5263,13 +5263,15 @@ simplify_subreg (enum machine_mode outermode, rtx op, && GET_MODE_BITSIZE (innermode) >= (2 * GET_MODE_BITSIZE (outermode)) && CONST_INT_P (XEXP (op, 1)) && (INTVAL (XEXP (op, 1)) & (GET_MODE_BITSIZE (outermode) - 1)) == 0 + && INTVAL (XEXP (op, 1)) >= 0 && INTVAL (XEXP (op, 1)) < GET_MODE_BITSIZE (innermode) && byte == subreg_lowpart_offset (outermode, innermode)) { int shifted_bytes = INTVAL (XEXP (op, 1)) / BITS_PER_UNIT; return simplify_gen_subreg (outermode, XEXP (op, 0), innermode, (WORDS_BIG_ENDIAN - ? byte - shifted_bytes : byte + shifted_bytes)); + ? byte - shifted_bytes + : byte + shifted_bytes)); } return NULL_RTX; diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 3b29417a5f4a..ba42e8d8d9f6 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2009-08-27 Uros Bizjak + + PR rtl-optimization/40861 + * gcc.dg/pr40861.c: New test. + 2009-08-27 Janus Weil PR fortran/40869 @@ -8,17 +13,17 @@ PR libfortran/39667 * gfortran.dg/f2003_io_4.f03: Don't require target fd_truncate, open temp file with status="scratch". - * gfortran.dg/fmt_cache_1.f: Likewise - * gfortran.dg/fmt_exhaust.f90: Likewise - * gfortran.dg/fmt_t_4.f90: Likewise - * gfortran.dg/fseek.f90: Likewise - * gfortran.dg/list_read_5.f90: Likewise - * gfortran.dg/namelist_39.f90: Likewise - * gfortran.dg/namelist_56.f90: Likewise - * gfortran.dg/read_bad_advance.f90: Likewise - * gfortran.dg/read_repeat.f90: Likewise - * gfortran.dg/read_size_noadvance.f90: Likewise - * gfortran.dg/read_x_past.f: Likewise + * gfortran.dg/fmt_cache_1.f: Likewise. + * gfortran.dg/fmt_exhaust.f90: Likewise. + * gfortran.dg/fmt_t_4.f90: Likewise. + * gfortran.dg/fseek.f90: Likewise. + * gfortran.dg/list_read_5.f90: Likewise. + * gfortran.dg/namelist_39.f90: Likewise. + * gfortran.dg/namelist_56.f90: Likewise. + * gfortran.dg/read_bad_advance.f90: Likewise. + * gfortran.dg/read_repeat.f90: Likewise. + * gfortran.dg/read_size_noadvance.f90: Likewise. + * gfortran.dg/read_x_past.f: Likewise. 2009-08-27 Tobias Burnus @@ -112,8 +117,8 @@ * gcc.target/i386/sse5-nmsubXX.c * gcc.target/i386/sse5-rotate3-vector.c * gcc.target/i386/sse5-fma-vector.c - * gcc.target/i386/sse5-imul32widen-vector.c: Remove SSE5 related testcases - * gcc.target/i386/sse5-ima-vector.c + * gcc.target/i386/sse5-imul32widen-vector.c + * gcc.target/i386/sse5-ima-vector.c: Remove SSE5 related testcases. * gcc.target/i386/funcspec-8.c: Replace SSE5 by SSE4. * gcc.target/i386/funcspec-5.c: Remove SSE5. @@ -173,10 +178,9 @@ 2009-08-24 Kai Tietz - *gcc.dg/format/ms-format1.c: Add new cases for I32 + * gcc.dg/format/ms-format1.c: Add new cases for I32 width specifier. + * gcc.dg/format/ms-format2.c: New test about illegal use of I32/I64 width specifier. - *gcc.dg/format/ms-format2.c: New test about illegal - use of I32/I64 width specifier. 2009-08-23 Jerry DeLisle diff --git a/gcc/testsuite/gcc.dg/pr40861.c b/gcc/testsuite/gcc.dg/pr40861.c new file mode 100644 index 000000000000..1d955e6168b0 --- /dev/null +++ b/gcc/testsuite/gcc.dg/pr40861.c @@ -0,0 +1,7 @@ +/* { dg-do compile } */ +/* { dg-options "-O" } */ + +int foo(int i) +{ + return (1LL >> 128 * i) && i; +}