From: Paul Kocialkowski Date: Tue, 1 Jul 2025 20:11:22 +0000 (+0200) Subject: clk: sunxi-ng: v3s: Fix CSI1 MCLK clock name X-Git-Tag: v6.16~4^2^2~1 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=2b73328629396d32e41ca1f023653b07abf2b42f;p=thirdparty%2Fkernel%2Flinux.git clk: sunxi-ng: v3s: Fix CSI1 MCLK clock name The CSI1 MCLK clock is reported as "csi-mclk" while it is specific to CSI1 as the name of the definition indicates. Fix it in the driver. Fixes: d0f11d14b0bc ("clk: sunxi-ng: add support for V3s CCU") Signed-off-by: Paul Kocialkowski Reviewed-By: Icenowy Zheng Link: https://patch.msgid.link/20250701201124.812882-4-paulk@sys-base.io Signed-off-by: Chen-Yu Tsai --- diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-v3s.c b/drivers/clk/sunxi-ng/ccu-sun8i-v3s.c index d12791b31a9d7..86d933d1ac722 100644 --- a/drivers/clk/sunxi-ng/ccu-sun8i-v3s.c +++ b/drivers/clk/sunxi-ng/ccu-sun8i-v3s.c @@ -366,7 +366,7 @@ static const char * const csi_sclk_parents[] = { "pll-video", "pll-isp" }; static SUNXI_CCU_M_WITH_MUX_GATE(csi_sclk_clk, "csi-sclk", csi_sclk_parents, 0x134, 16, 4, 24, 3, BIT(31), 0); -static SUNXI_CCU_M_WITH_MUX_GATE(csi1_mclk_clk, "csi-mclk", csi_mclk_parents, +static SUNXI_CCU_M_WITH_MUX_GATE(csi1_mclk_clk, "csi1-mclk", csi_mclk_parents, 0x134, 0, 5, 8, 3, BIT(15), 0); static SUNXI_CCU_M_WITH_GATE(ve_clk, "ve", "pll-ve",