From: Linus Torvalds Date: Sat, 5 Apr 2014 22:46:37 +0000 (-0700) Subject: Merge tag 'tags/cleanup2-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/arm... X-Git-Tag: v3.15-rc1~74 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=2bf73dd61a84cdf27e49f48e08739af6ba70ace1;p=thirdparty%2Flinux.git Merge tag 'tags/cleanup2-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC late cleanups from Arnd Bergmann: "These could not be part of the first cleanup branch, because they either came too late in the cycle, or they have dependencies on other branches. Important changes are: - The integrator platform is almost multiplatform capable after some reorganization (Linus Walleij) - Minor cleanups on Zynq (Michal Simek) - Lots of changes for Exynos and other Samsung platforms, including further preparations for multiplatform support and the clocks bindings are rearranged" * tag 'tags/cleanup2-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (54 commits) devicetree: fix newly added exynos sata bindings ARM: EXYNOS: Fix compilation error in cpuidle.c ARM: S5P64X0: Explicitly include linux/serial_s3c.h in mach/pm-core.h ARM: EXYNOS: Remove hardware.h file ARM: SAMSUNG: Remove hardware.h inclusion ARM: S3C24XX: Remove invalid code from hardware.h dt-bindings: clock: Move exynos-audss-clk.h to dt-bindings/clock ARM: dts: Keep some essential LDOs enabled for arndale-octa board ARM: dts: Disable MDMA1 node for arndale-octa board ARM: S3C64XX: Fix build for implicit serial_s3c.h inclusion serial: s3c: Fix build of header without serial_core.h preinclusion ARM: EXYNOS: Allow wake-up using GIC interrupts ARM: EXYNOS: Stop using legacy Samsung PM code ARM: EXYNOS: Remove PM initcalls and useless indirection ARM: EXYNOS: Fix abuse of CONFIG_PM ARM: SAMSUNG: Move s3c_pm_check_* prototypes to plat/pm-common.h ARM: SAMSUNG: Move common save/restore helpers to separate file ARM: SAMSUNG: Move Samsung PM debug code into separate file ARM: SAMSUNG: Consolidate PM debug functions ARM: SAMSUNG: Use debug_ll_addr() to get UART base address ... --- 2bf73dd61a84cdf27e49f48e08739af6ba70ace1 diff --cc Documentation/devicetree/bindings/phy/samsung-phy.txt index 28f9edb8f19c6,67d38b3176cf9..b422e38946d78 --- a/Documentation/devicetree/bindings/phy/samsung-phy.txt +++ b/Documentation/devicetree/bindings/phy/samsung-phy.txt @@@ -21,56 -21,42 +21,96 @@@ Required properties - reg : offset and length of the Display Port PHY register set; - #phy-cells : from the generic PHY bindings, must be 0; +Samsung S5P/EXYNOS SoC series USB PHY +------------------------------------------------- + +Required properties: +- compatible : should be one of the listed compatibles: + - "samsung,exynos4210-usb2-phy" + - "samsung,exynos4x12-usb2-phy" + - "samsung,exynos5250-usb2-phy" +- reg : a list of registers used by phy driver + - first and obligatory is the location of phy modules registers +- samsung,sysreg-phandle - handle to syscon used to control the system registers +- samsung,pmureg-phandle - handle to syscon used to control PMU registers +- #phy-cells : from the generic phy bindings, must be 1; +- clocks and clock-names: + - the "phy" clock is required by the phy module, used as a gate + - the "ref" clock is used to get the rate of the clock provided to the + PHY module + +The first phandle argument in the PHY specifier identifies the PHY, its +meaning is compatible dependent. For the currently supported SoCs (Exynos 4210 +and Exynos 4212) it is as follows: + 0 - USB device ("device"), + 1 - USB host ("host"), + 2 - HSIC0 ("hsic0"), + 3 - HSIC1 ("hsic1"), + +Exynos 4210 and Exynos 4212 use mode switching and require that mode switch +register is supplied. + +Example: + +For Exynos 4412 (compatible with Exynos 4212): + +usbphy: phy@125b0000 { + compatible = "samsung,exynos4x12-usb2-phy"; + reg = <0x125b0000 0x100>; + clocks = <&clock 305>, <&clock 2>; + clock-names = "phy", "ref"; + status = "okay"; + #phy-cells = <1>; + samsung,sysreg-phandle = <&sys_reg>; + samsung,pmureg-phandle = <&pmu_reg>; +}; + +Then the PHY can be used in other nodes such as: + +phy-consumer@12340000 { + phys = <&usbphy 2>; + phy-names = "phy"; +}; + +Refer to DT bindings documentation of particular PHY consumer devices for more +information about required PHYs and the way of specification. ++ + Samsung SATA PHY Controller + --------------------------- + + SATA PHY nodes are defined to describe on-chip SATA Physical layer controllers. + Each SATA PHY controller should have its own node. + + Required properties: + - compatible : compatible list, contains "samsung,exynos5250-sata-phy" + - reg : offset and length of the SATA PHY register set; + - #phy-cells : must be zero + - clocks : must be exactly one entry + - clock-names : must be "sata_phyctrl" + - samsung,exynos-sataphy-i2c-phandle : a phandle to the I2C device, no arguments + - samsung,syscon-phandle : a phandle to the PMU system controller, no arguments + + Example: + sata_phy: sata-phy@12170000 { + compatible = "samsung,exynos5250-sata-phy"; + reg = <0x12170000 0x1ff>; + clocks = <&clock 287>; + clock-names = "sata_phyctrl"; + #phy-cells = <0>; + samsung,exynos-sataphy-i2c-phandle = <&sata_phy_i2c>; + samsung,syscon-phandle = <&pmu_syscon>; + }; + + Device-Tree bindings for sataphy i2c client driver + -------------------------------------------------- + + Required properties: + compatible: Should be "samsung,exynos-sataphy-i2c" + - reg: I2C address of the sataphy i2c device. + + Example: + + sata_phy_i2c:sata-phy@38 { + compatible = "samsung,exynos-sataphy-i2c"; + reg = <0x38>; + }; diff --cc arch/arm/Kconfig.debug index 8983919a4421a,a160744312abc..4a2fc0bf6fc91 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@@ -1158,7 -1162,7 +1158,7 @@@ config DEBUG_UNCOMPRES config UNCOMPRESS_INCLUDE string default "debug/uncompress.h" if ARCH_MULTIPLATFORM || ARCH_MSM || \ - ARCH_EXYNOS || ARCH_EFM32 - PLAT_SAMSUNG ++ PLAT_SAMSUNG || ARCH_EFM32 default "mach/uncompress.h" config EARLY_PRINTK diff --cc arch/arm/mach-zynq/Kconfig index 0e001a489a794,323e5053cb9fd..58c2b844e0a3c --- a/arch/arm/mach-zynq/Kconfig +++ b/arch/arm/mach-zynq/Kconfig @@@ -7,7 -8,12 +7,8 @@@ config ARCH_ZYN select HAVE_ARM_SCU if SMP select HAVE_ARM_TWD if SMP select ICST - select MIGHT_HAVE_CACHE_L2X0 - select USE_OF - select HAVE_SMP - select SPARSE_IRQ select CADENCE_TTC_TIMER - select ARM_GLOBAL_TIMER + select ARM_GLOBAL_TIMER if !CPU_FREQ + select MFD_SYSCON help Support for Xilinx Zynq ARM Cortex A9 Platform diff --cc arch/arm/mach-zynq/common.c index a39be8e808560,dca60d5ba7564..6fcc584c1a110 --- a/arch/arm/mach-zynq/common.c +++ b/arch/arm/mach-zynq/common.c @@@ -74,7 -73,8 +75,9 @@@ static void __init zynq_init_machine(vo of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); platform_device_register(&zynq_cpuidle_device); + platform_device_register_full(&devinfo); + + zynq_slcr_init(); } static void __init zynq_timer_init(void)