From: Srinivas Pandruvada Date: Mon, 2 Jul 2018 19:01:53 +0000 (-0700) Subject: ata: libahci: Correct setting of DEVSLP register X-Git-Tag: v4.19-rc1~18^2~8 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=2dbb3ec29a6c069035857a2fc4c24e80e5dfe3cc;p=thirdparty%2Fkernel%2Flinux.git ata: libahci: Correct setting of DEVSLP register We have seen that on some platforms, SATA device never show any DEVSLP residency. This prevent power gating of SATA IP, which prevent system to transition to low power mode in systems with SLP_S0 aka modern standby systems. The PHY logic is off only in DEVSLP not in slumber. Reference: https://www.intel.com/content/dam/www/public/us/en/documents/datasheets /332995-skylake-i-o-platform-datasheet-volume-1.pdf Section 28.7.6.1 Here driver is trying to do read-modify-write the devslp register. But not resetting the bits for which this driver will modify values (DITO, MDAT and DETO). So simply reset those bits before updating to new values. Signed-off-by: Srinivas Pandruvada Reviewed-by: Rafael J. Wysocki Reviewed-by: Hans de Goede Signed-off-by: Tejun Heo --- diff --git a/drivers/ata/libahci.c b/drivers/ata/libahci.c index f79dce613e54a..fdb7d7bf76261 100644 --- a/drivers/ata/libahci.c +++ b/drivers/ata/libahci.c @@ -2162,6 +2162,8 @@ static void ahci_set_aggressive_devslp(struct ata_port *ap, bool sleep) deto = 20; } + /* Make dito, mdat, deto bits to 0s */ + devslp &= ~GENMASK_ULL(24, 2); devslp |= ((dito << PORT_DEVSLP_DITO_OFFSET) | (mdat << PORT_DEVSLP_MDAT_OFFSET) | (deto << PORT_DEVSLP_DETO_OFFSET) |