From: Daniel Steger <daniel.steger@xilinx.com>
Date: Fri, 11 Jan 2019 22:08:23 +0000 (-0800)
Subject: arm64: zynqmp: Add in lpd, cci, ddr axi perf monitors
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=2dbd1a524084c9b738c33783dfe2f9a48e83ee69;p=thirdparty%2Fu-boot.git

arm64: zynqmp: Add in lpd, cci, ddr axi perf monitors

The current zynqmp.dtsi does not include the axi performance
monitors for the lpd, cci, or ddr. This set of patches adds
in the missing dt entries for the ps apms.

Signed-off-by: Daniel Steger <daniel.steger@xilinx.com>
Reviewed-by: Shubhrajyoti Datta <Shubhrajyoti.datta@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---

diff --git a/arch/arm/dts/zynqmp-clk-ccf.dtsi b/arch/arm/dts/zynqmp-clk-ccf.dtsi
index 979a32b7a17..dc881b609cb 100644
--- a/arch/arm/dts/zynqmp-clk-ccf.dtsi
+++ b/arch/arm/dts/zynqmp-clk-ccf.dtsi
@@ -203,6 +203,18 @@
 	clocks = <&clk 31>;
 };
 
+&perf_monitor_ddr {
+	clocks = <&clk 28>;
+};
+
+&perf_monitor_cci {
+	clocks = <&clk 28>;
+};
+
+&perf_monitor_lpd {
+	clocks = <&clk 31>;
+};
+
 &pcie {
 	clocks = <&clk 23>;
 };
diff --git a/arch/arm/dts/zynqmp-clk.dtsi b/arch/arm/dts/zynqmp-clk.dtsi
index ef6fc8efde3..1f45f429059 100644
--- a/arch/arm/dts/zynqmp-clk.dtsi
+++ b/arch/arm/dts/zynqmp-clk.dtsi
@@ -182,6 +182,18 @@
 	clocks = <&clk100>;
 };
 
+&perf_monitor_ddr {
+	clocks = <&clk100>;
+};
+
+&perf_monitor_cci {
+	clocks = <&clk100>;
+};
+
+&perf_monitor_lpd {
+	clocks = <&clk100>;
+};
+
 &qspi {
 	clocks = <&clk300 &clk300>;
 };
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index 9a035b227a9..ff5a2314bfe 100644
--- a/arch/arm/dts/zynqmp.dtsi
+++ b/arch/arm/dts/zynqmp.dtsi
@@ -777,6 +777,60 @@
 			xlnx,metric-count-scale = <1>;
 		};
 
+		perf_monitor_ddr: perf-monitor@fd0b0000 {
+			compatible = "xlnx,axi-perf-monitor";
+			reg = <0x0 0xfd0b0000 0x0 0x10000>;
+			interrupts = <0 27 4>;
+			interrupt-parent = <&gic>;
+			xlnx,enable-profile = <0>;
+			xlnx,enable-trace = <0>;
+			xlnx,num-monitor-slots = <6>;
+			xlnx,enable-event-count = <1>;
+			xlnx,enable-event-log = <0>;
+			xlnx,have-sampled-metric-cnt = <1>;
+			xlnx,num-of-counters = <10>;
+			xlnx,metric-count-width = <32>;
+			xlnx,metrics-sample-count-width = <32>;
+			xlnx,global-count-width = <32>;
+			xlnx,metric-count-scale = <1>;
+		};
+
+		perf_monitor_cci: perf-monitor@fd490000 {
+			compatible = "xlnx,axi-perf-monitor";
+			reg = <0x0 0xfd490000 0x0 0x10000>;
+			interrupts = <0 27 4>;
+			interrupt-parent = <&gic>;
+			xlnx,enable-profile = <0>;
+			xlnx,enable-trace = <0>;
+			xlnx,num-monitor-slots = <1>;
+			xlnx,enable-event-count = <1>;
+			xlnx,enable-event-log = <0>;
+			xlnx,have-sampled-metric-cnt = <1>;
+			xlnx,num-of-counters = <8>;
+			xlnx,metric-count-width = <32>;
+			xlnx,metrics-sample-count-width = <32>;
+			xlnx,global-count-width = <32>;
+			xlnx,metric-count-scale = <1>;
+		};
+
+		perf_monitor_lpd: perf-monitor@ffa10000 {
+			compatible = "xlnx,axi-perf-monitor";
+			reg = <0x0 0xffa10000 0x0 0x10000>;
+			interrupts = <0 25 4>;
+			interrupt-parent = <&gic>;
+			xlnx,enable-profile = <0>;
+			xlnx,enable-trace = <0>;
+			xlnx,num-monitor-slots = <1>;
+			xlnx,enable-event-count = <1>;
+			xlnx,enable-event-log = <1>;
+			xlnx,have-sampled-metric-cnt = <1>;
+			xlnx,num-of-counters = <8>;
+			xlnx,metric-count-width = <32>;
+			xlnx,metrics-sample-count-width = <32>;
+			xlnx,global-count-width = <32>;
+			xlnx,metric-count-scale = <1>;
+		};
+
 		pcie: pcie@fd0e0000 {
 			compatible = "xlnx,nwl-pcie-2.11";
 			status = "disabled";