From: Jani Nikula Date: Wed, 25 Jun 2025 10:32:25 +0000 (+0300) Subject: drm/i915/bw: abstract intel_bw_qgv_point_peakbw() X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=2e5822368c07316d66fe016c46bbc8e50d7b7203;p=thirdparty%2Fkernel%2Flinux.git drm/i915/bw: abstract intel_bw_qgv_point_peakbw() Add intel_bw_qgv_point_peakbw() helper to avoid looking at struct intel_bw_state internals outside of intel_bw.c. Reviewed-by: Imre Deak Link: https://lore.kernel.org/r/49a723e0f23e06a6045f8f9e0d06648a6bc899c7.1750847509.git.jani.nikula@intel.com Signed-off-by: Jani Nikula --- diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c index 3c3b4dd71ec33..1f86f3cb9cae1 100644 --- a/drivers/gpu/drm/i915/display/intel_bw.c +++ b/drivers/gpu/drm/i915/display/intel_bw.c @@ -1739,3 +1739,8 @@ bool intel_bw_can_enable_sagv(struct intel_display *display, return bw_state->pipe_sagv_reject == 0; } + +int intel_bw_qgv_point_peakbw(const struct intel_bw_state *bw_state) +{ + return bw_state->qgv_point_peakbw; +} diff --git a/drivers/gpu/drm/i915/display/intel_bw.h b/drivers/gpu/drm/i915/display/intel_bw.h index 68b95c2a0cb92..7728dc86a31a3 100644 --- a/drivers/gpu/drm/i915/display/intel_bw.h +++ b/drivers/gpu/drm/i915/display/intel_bw.h @@ -79,5 +79,6 @@ bool intel_bw_can_enable_sagv(struct intel_display *display, const struct intel_bw_state *bw_state); void icl_sagv_pre_plane_update(struct intel_atomic_state *state); void icl_sagv_post_plane_update(struct intel_atomic_state *state); +int intel_bw_qgv_point_peakbw(const struct intel_bw_state *bw_state); #endif /* __INTEL_BW_H__ */ diff --git a/drivers/gpu/drm/i915/display/intel_pmdemand.c b/drivers/gpu/drm/i915/display/intel_pmdemand.c index 8334744a2e23a..a4d53fd944898 100644 --- a/drivers/gpu/drm/i915/display/intel_pmdemand.c +++ b/drivers/gpu/drm/i915/display/intel_pmdemand.c @@ -346,7 +346,7 @@ int intel_pmdemand_atomic_check(struct intel_atomic_state *state) /* firmware will calculate the qclk_gv_index, requirement is set to 0 */ new_pmdemand_state->params.qclk_gv_index = 0; - new_pmdemand_state->params.qclk_gv_bw = new_bw_state->qgv_point_peakbw; + new_pmdemand_state->params.qclk_gv_bw = intel_bw_qgv_point_peakbw(new_bw_state); new_dbuf_state = intel_atomic_get_dbuf_state(state); if (IS_ERR(new_dbuf_state))