From: Jakub Kicinski <kuba@kernel.org>
Date: Thu, 16 Jan 2025 18:30:22 +0000 (-0800)
Subject: Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
X-Git-Tag: v6.14-rc1~162^2~45
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=2ee738e90e80850582cbe10f34c6447965c1d87b;p=thirdparty%2Fkernel%2Flinux.git

Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net

Cross-merge networking fixes after downstream PR (net-6.13-rc8).

Conflicts:

drivers/net/ethernet/realtek/r8169_main.c
  1f691a1fc4be ("r8169: remove redundant hwmon support")
  152d00a91396 ("r8169: simplify setting hwmon attribute visibility")
https://lore.kernel.org/20250115122152.760b4e8d@canb.auug.org.au

Adjacent changes:

drivers/net/ethernet/broadcom/bnxt/bnxt.c
  152f4da05aee ("bnxt_en: add support for rx-copybreak ethtool command")
  f0aa6a37a3db ("eth: bnxt: always recalculate features after XDP clearing, fix null-deref")

drivers/net/ethernet/intel/ice/ice_type.h
  50327223a8bb ("ice: add lock to protect low latency interface")
  dc26548d729e ("ice: Fix quad registers read on E825")

Signed-off-by: Jakub Kicinski <kuba@kernel.org>
---

2ee738e90e80850582cbe10f34c6447965c1d87b
diff --cc drivers/net/ethernet/broadcom/bnxt/bnxt.c
index caddb5cbc0246,b6f844cac80eb..748c9b1ea7010
--- a/drivers/net/ethernet/broadcom/bnxt/bnxt.c
+++ b/drivers/net/ethernet/broadcom/bnxt/bnxt.c
@@@ -16264,9 -16229,8 +16279,9 @@@ static int bnxt_init_one(struct pci_de
  	if (bp->max_fltr < BNXT_MAX_FLTR)
  		bp->max_fltr = BNXT_MAX_FLTR;
  	bnxt_init_l2_fltr_tbl(bp);
- 	bnxt_set_rx_skb_mode(bp, false);
+ 	__bnxt_set_rx_skb_mode(bp, false);
  	bnxt_set_tpa_flags(bp);
 +	bnxt_init_ring_params(bp);
  	bnxt_set_ring_params(bp);
  	bnxt_rdma_aux_device_init(bp);
  	rc = bnxt_set_dflt_rings(bp, true);
diff --cc drivers/net/ethernet/intel/ice/ice_type.h
index f5eac66d207e9,4a9ef722635ff..33a1a5934c0d5
--- a/drivers/net/ethernet/intel/ice/ice_type.h
+++ b/drivers/net/ethernet/intel/ice/ice_type.h
@@@ -851,17 -848,8 +851,16 @@@ struct ice_mbx_data 
  #define ICE_PORTS_PER_QUAD	4
  #define ICE_GET_QUAD_NUM(port) ((port) / ICE_PORTS_PER_QUAD)
  
 +#define ATQBAL_FLAGS_INTR_IN_PROGRESS	BIT(0)
 +
 +struct ice_e810_params {
 +	/* The wait queue lock also protects the low latency interface */
 +	wait_queue_head_t atqbal_wq;
 +	unsigned int atqbal_flags;
 +};
 +
  struct ice_eth56g_params {
  	u8 num_phys;
- 	u8 phy_addr[2];
  	bool onestep_ena;
  	bool sfd_ena;
  	u32 peer_delay;